NJU3505L データシートの表示（PDF） - Japan Radio Corporation

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NJU3505L

4-BIT SINGLE CHIP MICRO CONTROLLER

Japan Radio Corporation  

NJU3505

An example of the serial data reception program )

In the internal clock operation, SDI(O) terminal is set as the input and the serial input data is transferred

to RAM.

:

:

;---- Interrupt process ----

ORG $40

SINT

SRPC

LDI Y,1

TPA

TBA 0

JMP SIO_OK

JMP SINT_E

;

SIO_OK LDI Y,2

RRPC

LDI X,SIO_DAT.X

LDI Y,SIO_DAT.Y

TPMICY

TPMICY

;

SINT_E RETI

;

;------ Serial data inputting process ------

SIO_IN SRPC

LDI Y,0

CLA

TAP

LDI Y,1

LDI A,%0000

TAP

LDI A,%0001

TAP

;

:

:

WSEG

SIO_DAT DS 2

;Interrupt vector address of FULL or EMPTY

;

;The Serial Input / Output control register is set

;

;The end flag of transmission is tested

;

;

;The Serial Input / Output shift register is set

;RAM to store the serial input data is pointed

;RAM address, X=0

;RAM address, Y=0

;The serial input data is transferred to RAM(lower

; 4-bit) and Y-register is incremented

;The serial input data is transferred to RAM(higher

; 4-bit) and Y-register is incremented

; End of the interrupt process

;

;The peripheral register table is set

;

;

;The Serial Input / Output control register is set

;The internal clock operation is set and the SDI(O)

; terminal is set as the input

;

;The serial data reception is started

;

;The RAM area is set

;The area to store the serial input data is secured

- 36 -

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