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NJU3502L データシートの表示(PDF) - Japan Radio Corporation

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NJU3502L
JRC
Japan Radio Corporation  JRC
NJU3502L Datasheet PDF : 42 Pages
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NJU3502
s TIMER
The NJU3502 prepares Programmable Timer consisted of 8-bit binary counter.
[Structure of TIMER]
DB (4-bit)
4
DEMULTIPLEXER
4
4
INITIAL VALUE REGISTER
8
8-bit TIMER
4
4
MULTIPLEXER
4
TIMER INTERRUPT
INTERNAL CLOCK
PHY3 b2 b1 b0
TIMER CONTROL REGISTER
Timer counts only the internal clock. The initial value of the Timer can be set the optional value by the
program which instructs to write the data(a value of the time-interval) into the Initial Value Register. In
enabling the Timer interrupt, when the Timer counts from "FF" to "00" (overflow), the Timer interrupt request
occurs and the internal interrupt process starts the own operation.
In the repeat mode of the Timer operation, when the Timer overflows, the initial value is loaded into the Timer
automatically and the Timer continues the count from the loaded initial value (Auto re-load function: See the
repeat mode of the Timer operation timing chart). In the single mode of the Timer operation, when the Timer
overflows, the count is stopped(See the single mode of the Timer operation timing chart). For starting the
count operation again, the start bit(LSB) of Timer Control Register must be set to "1". The latest initial value is
set into the Timer and the Timer starts the count.
In enabling the interrupt operation, when the Timer overflows, the Timer overflow flag is set to "1" and the
internal interrupt process starts the own operation. In disabling the Timer interrupt, the Timer overflow flag is
not set. The Timer overflow flag is initialized by the Timer Start or the Reset signal.
The internal clock into the counter is the divided clock from the internal prescaler. the frequency of the clock
can be selected by the mask option from follows which are the dividing numbers based on the inverse of the 1-
instruction executing period(1/fOSC x 6).
1/2, 1/4, 1/8, 1/16, 1/32,1/64, 1/128, 1/256, 1/512, 1/1024, 1/2048,1/4096
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