NCV4279BDWR2 データシートの表示（PDF） - ON Semiconductor

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NCV4279BDWR2

5.0 V Micropower 150 mA LDO Linear Regulator with DELAY, Adjustable RESET, and Monitor FLAG

ON Semiconductor 

NCV4279B

APPLICATION NOTES

FLAG MONITOR

Figure 14 shows the FLAG Monitor waveforms as a result

of the circuit depicted in Figure 13. As the output voltage

falls (VOUT), the Monitor threshold is crossed. This causes

the voltage on the FLAG output to go low sending a warning

signal to the microprocessor that a RESET signal may occur

in a short period of time. TWARNING is the time the

microprocessor has to complete the function it is currently

working on and get ready for the RESET shutdown signal.

VOUT

The value for the output capacitor COUT shown in Figure 15

should work for most applications, however it is not

necessarily the optimized solution.

VIN

CIN*

0.1 mF

VOUT

NCV4279B

RESET

RRST

COUT**

10 mF

MON

FLAG Monitor

Ref. Voltage

RESET

FLAG

TWARNING

Figure 14. FLAG Monitor Circuit Waveform

SETTING THE DELAY TIME

The delay time is controlled by the Reset Delay Low

Voltage, Delay Switching Threshold, and the Delay Charge

Current. The delay follows the equation:

tDELAY

+

[CDELAY(Vdt *

Delay

Reset Delay Low

Charge Current

Voltage)]

Example:

Using CDELAY = 33 nF.

Assume reset Delay Low Voltage = 0.

Use the typical value for Vdt = 1.8 V.

Use the typical value for Delay Charge Current = 2.5 mA.

tDELAY

+

[33

nF(1.8 *

2.5 mA

0)]

+

23.8

ms

STABILITY CONSIDERATIONS

The output or compensation capacitor helps determine

three main characteristics of a linear regulator: start−up

delay, load transient response and loop stability.

The capacitor value and type should be based on cost,

availability, size and temperature constraints. A tantalum or

aluminum electrolytic capacitor is best, since a film or

ceramic capacitor with almost zero ESR can cause

instability. The aluminum electrolytic capacitor is the least

expensive solution, but, if the circuit operates at low

temperatures (−25°C to −40°C), both the value and ESR of

the capacitor will vary considerably. The capacitor

manufacturers data sheet usually provides this information.

*CIN required if regulator is located far from the power supply filter.

**COUT required for stability. Capacitor must operate at minimum

temperature expected.

Figure 15. Test and Application Circuit Showing

Output Compensation

CALCULATING POWER DISSIPATION IN A

SINGLE OUTPUT LINEAR REGULATOR

The maximum power dissipation for a single output

regulator (Figure 16) is:

PD(max) + [VIN(max) * VOUT(min)] IOUT(max)

(1)

) VIN(max)IQ

where:

VIN(max) is the maximum input voltage,

VOUT(min) is the minimum output voltage,

IOUT(max) is the maximum output current for the

application, and

IQ is the quiescent current the regulator consumes at

IOUT(max).

Once the value of PD(max) is known, the maximum

permissible value of RqJA can be calculated:

RqJA

+

150°C *

PD

TA

(2)

The value of RqJA can then be compared with those in the

package section of the data sheet. Those packages with

RqJA’s less than the calculated value in equation 2 will keep

the die temperature below 150°C.

In some cases, none of the packages will be sufficient to

dissipate the heat generated by the IC, and an external

heatsink will be required.

IIN

VIN

SMART

REGULATOR®

} Control

Features

IQ

IOUT

VOUT

Figure 16. Single Output Regulator with Key

Performance Parameters Labeled

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