NCP5604B データシートの表示（PDF） - ON Semiconductor
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NCP5604B Datasheet PDF : 15 Pages
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NCP5604A, NCP5604B
PIN FUNCTION DESCRIPTION
Pin
Symbol
Type
Description
1
VBAT
INPUT, POWER
Input Battery voltage to supply the analog and digital blocks. The pin must be decoupled to
ground by a 1.0 mF ceramic capacitor.
2
EN
INPUT, DIGITAL
This pin carries the Enable function to control the DC−DC converter. It can be used to
digitally dim the LED by using a PWM technique.
EN = Low ³ shutdown mode, the DC−DC is disconnected from the load.
EN = High ³ operating mode, the DC−DC is activated.
The digital PWM dimming can operate over the 100 Hz − 200 kHz frequency, depending
upon the application requirements.
3
IREF
INPUT, ANALOG
This pin provides the reference current, based on the internal bandgap voltage reference,
to control the output current flowing in the LED. A 1% tolerance, or better, resistor shall be
used to get the highest accuracy of the LED biases. An external current source can be
used to bias this pin to dim the light coming out of the LED.
In no case shall the voltage at pin 3 be forced either higher or lower than the 600 mV
provided by the internal reference.
4
AGND
POWER
This pin is the GROUND signal for the analog and digital blocks and must be connected to
the system ground.
5
LED4
INPUT, POWER
NCP5604A: This pin sinks to ground and monitors the current flowing into the fourth LED,
intended to be used in backlight application. The current is limited to 25 mA maximum
(Note 2).
NCP5604B: This pin is not connected.
6
LED3
INPUT, POWER
This pin sinks to ground and monitors the current flowing into the third LED, intended to be
used in backlight application. The current is limited to 25 mA maximum (Note 2).
7
LED2
INPUT, POWER
This pin sinks to ground and monitors the current flowing into the second LED, intended to
be used in backlight application. The current is limited to 25mA maximum (Note 2).
8
LED1
INPUT, POWER
This pin sinks to ground and monitors the current flowing into the first LED, intended to be
used in backlight application. The current is limited to 25 mA maximum (Note 2).
9
PGND
POWER
This pin is the GROUND reference for the DC−DC converter and the output current
control. The pin must be connected to the system ground, a ground plane being strongly
recommended.
10
C1P
POWER
One side of the external charge pump capacitor (CFLY) is connected to this pin, associated
with C1N, pin 11 (Note 1).
11
C1N
POWER
One side of the external charge pump capacitor (CFLY) is connected to this pin, associated
with C1P, pin 10 (Note 1).
12
VOUT OUTPUT, POWER This pin provides the output voltage supplied by the DC−DC converter. The Vout pin must
be bypassed by 1.0 mF ceramic capacitor located as close as possible to the pin to
properly bypass the output voltage to ground. The circuit shall not operate without such
bypass capacitor properly connected to the Vout pin.
The output voltage is internally clamped to 5.5 V in the event of no load situation. On the
other hand, the output current is limited to 100 mA in the event of a short circuit to ground.
13
C2P
POWER
One side of the external charge pump capacitor (CFLY) is connected to this pin, associated
with C2N, pin 14 (Note 1).
14
C2N
POWER
One side of the external charge pump capacitor (CFLY) is connected to this pin, associated
with C2P, pin 13 (Note 1).
15
C3P
POWER
One side of the external charge pump capacitor (CFLY) is connected to this pin, associated
with C3N, pin 16 (Note 1).
16
C3N
POWER
One side of the external charge pump capacitor (CFLY) is connected to this pin, associated
with C3P, pin 15 (Note 1).
1. Using low ESR 1.0 mF ceramic capacitor is mandatory to optimize the Charge Pump efficiency. The DC Bias effect must be taken into account
when selecting the ceramic capacitor. Smallest foot print packages (size 0602 and lower) are prone to strong DC bias effect, reducing the real
capacitance significantly.
2. Total DC−DC output current is limited to 100 mA.
3. The exposed flag shall be connected to ground.
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