NCP1250 データシートの表示（PDF） - ON Semiconductor

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NCP1250

Current-Mode PWM Controller for Off-line Power Supplies

ON Semiconductor 

NCP1250

ELECTRICAL CHARACTERISTICS

(For typical values TJ = 25C, for min/max values TJ = −40C to +125C, Max TJ = 150C, VCC = 12 V unless otherwise noted)

Symbol

Rating

Pin Min Typ Max Unit

SUPPLY SECTION − (For the best efficiency performance, we recommend a VCC below 20 V)

VCCON VCC increasing level at which driving pulses are authorized

VCC(min) VCC decreasing level at which driving pulses are stopped

VCCHYST Hysteresis VCCON − VCC(min)

VZENER Clamped VCC when latched off / burst mode activation @ ICC = 500 mA

ICC1 Start−up current

5

16

18

20

V

5 8.2 8.8 9.4

V

5 6.0

V

5

7.0

V

5

15 mA

ICC2 Internal IC consumption with IFB = 50 mA, FSW = 65 kHz and CL = 0 nF

5

ICC3 Internal IC consumption with IFB = 50 mA, FSW = 65 kHz and CL = 1 nF

5

ICC2 Internal IC consumption with IFB = 50 mA, FSW = 100 kHz and CL = 0 nF

5

ICC3 Internal IC consumption with IFB = 50 mA, FSW = 100 kHz and CL = 1 nF

5

ICCLATCH Current flowing into VCC pin that keeps the controller latched (Note 4)

5

TJ = −40C to +125C

TJ = 0C to +125C

ICCstby Internal IC consumption while in skip cycle (VCC = 12 V, driving a typical 6 A/600 V 5

MOSFET)

1.4 2.2 mA

2.1 3.0 mA

1.7 2.5 mA

3.1 4.0 mA

mA

40

32

550

mA

Rlim

Current−limit resistor in series with the latch SCR

DRIVE OUTPUT

5

4.0

kW

Tr

Output voltage rise−time @ CL = 1 nF, 10−90% of output signal

Tf

Output voltage fall−time @ CL = 1 nF, 10−90% of output signal

ROH

Source resistance

ROL

Sink resistance

Isource Peak source current, VGS = 0 V – (Note 5)

Isink

Peak sink current, VGS = 12 V – (Note 5)

VDRVlow DRV pin level at VCC close to VCC(min) with a 33 kW resistor to GND

VDRVhigh DRV pin level at VCC = 28 V – DRV unloaded

CURRENT COMPARATOR

6

40

ns

6

30

ns

6

13

W

6

6.0

W

6

300

mA

6

500

mA

6 8.0

V

6

10

12

14

V

IIB

VLimit1

VLimit2

Vfold

Vfreeze

TDEL

TLEB

TSS

Input Bias Current @ 0.8 V input level on pin 4

Maximum internal current setpoint – TJ = 25C – pin 3 grounded

Maximum internal current setpoint – TJ = −40C to 125C – pin 3 grounded

Default internal voltage set point for frequency foldback trip point – 45% of Vlimit

Internal peak current setpoint freeze ([31% of Vlimit)

Propagation delay from current detection to gate off−state

Leading Edge Blanking Duration

Internal soft−start duration activated upon startup, auto−recovery

4

0.02

mA

4 0.744 0.8 0.856 V

4 0.72 0.8 0.88 V

3

357

mV

3

250

mV

4

100 150 ns

4

300

ns

−

4.0

ms

IOPPo Setpoint decrease for pin 3 biased to –250 mV – (Note 6)

3

31.3

%

IOOPv

IOOPv

IOPPs

Voltage setpoint for pin 3 biased to −250 mV – (Note 6), TJ = 25C

Voltage setpoint for pin 3 biased to −250 mV – (Note 6), TJ = −40C to 125C

Setpoint decrease for pin 3 grounded

3 0.51 0.55 0.60 V

3 0.50 0.55 0.62 V

3

0

%

INTERNAL OSCILLATOR

fOSC

fOSC

Dmax

Oscillation frequency (65 kHz version)

Oscillation frequency (100 kHz version)

Maximum duty−cycle

−

61

65

71 kHz

−

92 100 108 kHz

−

76

80

84

%

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5

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