NCP1071 データシートの表示（PDF） - ON Semiconductor

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NCP1071

High-Voltage Switcher for Low Power Offline SMPS

ON Semiconductor 

NCP1070, NCP1071, NCP1072, NCP1075, NCP1076, NCP1077

Figure 25. The Charge/Discharge Cycle Over a 1 mF VCC Capacitor

As one can see, even if there is auxiliary winding to

provide energy for VCC, it happens that the device is still

biased by DSS during start−up time or some fault mode

when the voltage on auxiliary winding is not ready yet. The

VCC capacitor shall be dimensioned to avoid VCC crosses

VCC(off) level, which stops operation. The DV between

VCC(min) and VCC(off) is 0.4 V. There is no current source to

charge VCC capacitor when driver is on, i.e. drain voltage is

close to zero. Hence the VCC capacitor can be calculated

using

CVCC

w

ICC1Dmax

fOSC @ DV

(eq. 1)

Take the NCP1072 65 kHz device as an example. CVCC

should be above

0.8m @ 72%

59 kHz @ 0.4

A margin that covers the temperature drift and the voltage

drop due to switching inside FET should be considered, and

thus a capacitor above 0.1 mF is appropriate.

The VCC capacitor has only a supply role and its value

does not impact other parameters such as fault duration or

the frequency sweep period for instance. As one can see on

Figure 24, an internal active zener diode, protects the

switcher against lethal VCC runaways. This situation can

occur if the feedback loop optocoupler fails, for instance,

and you would like to protect the converter against an over

voltage event. In that case, the internal current increase

incurred by the VCC rapid growth triggers the over voltage

protection (OVP) circuit and immediately stops the output

pulses for trecovery duration (420 ms typically). Then a new

start−up attempt takes place to check whether the fault has

disappeared or not. The OVP paragraph gives more design

details on this particular section.

Fault Condition – Short−Circuit on VCC

In some fault situations, a short−circuit can purposely

occur between VCC and GND. In high line conditions (VHV

= 370 VDC) the current delivered by the startup device will

seriously increase the junction temperature. For instance,

since Istart1 equals 5 mA (the min corresponds to the highest

Tj), the device would dissipate 370 x 5 m = 1.85 W. To avoid

this situation, the controller includes a novel circuitry made

of two startup levels, Istart1 and Istart2. At power−up, as long

as VCC is below a 2.4 V level, the source delivers Istart2

(around 500 mA typical), then, when VCC reaches 2.4 V, the

source smoothly transitions to Istart1 and delivers its nominal

value. As a result, in case of short−circuit between VCC and

GND, the power dissipation will drop to 370 x 500u =

185 mW. Figure 25 portrays this particular behavior.

The first startup period is calculated by the formula C x V

= I x t, which implies a 1m x 2.4 / 500u = 4.8 ms startup time

for the first sequence. The second sequence is obtained by

toggling the source to 8 mA with a delta V of VCC(on) –

VCCTH = 8.2 – 2.4 = 5.8 V, which finally leads to a second

startup time of 1m x 5.8 / 8m = 0.725 ms. The total startup

time becomes 4.8m + 0.725m = 5.525 ms. Please note that

this calculation is approximated by the presence of the knee

in the vicinity of the transition.

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