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NCP1031

Low Power PWM Controller with On−Chip Power Switch and Startup Circuits for 48V Telecom Systems

ON Semiconductor 

NCP1030, NCP1031

OPERATING DESCRIPTION

Introduction

The NCP1030 and NCP1031 are a family of miniature

monolithic voltage−mode switching regulators designed for

isolated and non−isolated bias supply applications. The

internal startup circuit and the MOSFET are rated at 200 V,

making them ideal for 48 V telecom and 42 V automotive

applications. In addition, the NCP103x family can operate

from an existing 12 V supply. This controller family is

optimized for operation up to 1 MHz.

The NCP103x family incorporates in a single IC all the

active power, control logic and protection circuitry required

to implement, with a minimum of external components,

several switching regulator applications, such as a

secondary side bias supply or a low power dc−dc converter.

The NCP1030 is available in the space saving Micro8t

package and is targeted for applications requiring up to 3 W.

The NCP1031 is targeted for applications up to 6 W and is

available in the SO−8 package.

The NCP103x includes an extensive set of features

including over temperature protection, cycle by cycle

current limit, individual line under and overvoltage

detection comparators with hysteresis, and regulator output

undervoltage lockout with hysteresis, providing full

protection during fault conditions. A description of each of

the functional blocks is given below, and the representative

block diagram is shown in Figure 2.

Forward:

ǒ Ǔ cos−1

CCC +

1

*

VOUT@NP

DC@Vin@NS

2.6

ǸLOUTCOUT @ Ibias

(eq. 1)

where, Ibias is the bias current supplied by the VCC capacitor

including the IC bias current (ICC1) and any additional

current used to bias the feedback resistors (if used).

After initial startup, the VCC pin should be biased above

VCC(off) using an auxiliary winding. This will prevent the

startup regulator from turning ON and reduce power

dissipation. Also, the load should not be directly connected

to the VCC capacitor. Otherwise, the load may override the

startup circuit. Figure 33 shows the recommended

configuration for a non−isolated flyback converter.

+

+

Vin

Vout

−

−

NCP103x

GND VDRAIN

CT VCC

VFB

UV

COMP OV

Startup Circuit and Undervoltage Lockout

The NCP103x contains an internal 200 V startup regulator

that eliminates the need for external startup components.

The startup regulator consists of a constant current source

that supplies current from the input line (Vin) to the capacitor

on the VCC pin (CCC). Once the VCC voltage reaches

approximately 10 V, the startup circuit is disabled and the

Power Switch Circuit is enabled if no faults are present.

During this self−bias mode, power to the NCP103x is

supplied by the VCC capacitor. The startup regulator turns

ON again once VCC reaches 7.5 V. This “7.5−10” mode of

operation is known as Dynamic Self Supply (DSS). The

NCP1030 and NCP1031 startup currents are 12 mA and 16

mA, respectively.

If VCC falls below 7.5 V, the device enters a re−start mode.

While in the re−start mode, the VCC capacitor is allowed to

discharge to 6.5 V while the Power Switch is enabled. Once

the 6.5 V threshold is reached, the Power Switch Circuit is

disabled and the startup regulator is enabled to charge the

VCC capacitor. The Power Switch is enabled again once the

VCC voltage reaches 10 V. Therefore, the external VCC

capacitor must be sized such that a voltage greater than 7.5

V is maintained on the VCC capacitor while the converter

output reaches regulation. Otherwise, the converter will

enter the re−start mode. Equation (1) provides a guideline

for the selection of the VCC capacitor for a forward

converter;

Figure 33. Non−Isolated Bias Supply Configuration

The maximum voltage rating of the startup circuit is

200 V. Power dissipation should be observed to avoid

exceeding the maximum power dissipation of the package.

Error Amplifier

The internal error amplifier (EA) regulates the output

voltage of the bias supply. It compares a scaled output

voltage signal to an internal 2.5 V reference (VREF)

connected to its non−inverting input. The scaled signal is fed

into the feedback pin (VFB) which is the inverting input of the

error amplifier.

The output of the error amplifier is available for frequency

compensation and connection to the PWM comparator

through the COMP pin. To insure normal operation, the EA

compensation should be selected such that the EA frequency

response crosses 0 dB below 80 kHz.

The error amplifier input bias current is less than 1 mA

over the operating range. The output source and sink

currents are typically 110 mA and 550 mA, respectively.

Under load transient conditions, COMP may need to

move from the bottom to the top of the CT Ramp. A large

current is required to complete the COMP swing if small

resistors or large capacitors are used to implement the

compensation network. In which case, the COMP swing will

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