M5M4V64S20ATP-12 データシートの表示（PDF） - MITSUBISHI ELECTRIC

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M5M4V64S20ATP-12

64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM

MITSUBISHI ELECTRIC  

SDRAM (Rev.1.3)

Mar98

MITSUBISHI LSIs

M5M4V64S20ATP-8A,-8L,-8, -10L, -10

64M (4-BANK x 4194304-WORD x 4-BIT) Synchronous DRAM

FUNCTION TRUTH TABLE for CKE

CKE CKE

Current State

n-1 n

SELF-

HX

REFRESH*1 L H

LH

LH

LH

LH

LL

POWER

DOWN

HX

LH

LL

ALL BANKS H H

IDLE*2

HL

HL

HL

HL

HL

HL

LX

ANY STATE H H

other than

H

L

listed above L

H

LL

/CS /RAS /CAS /WE Add

Action

X X X X X INVALID

H X X X X Exit Self-Refresh (Idle after tRC)

L H H H X Exit Self-Refresh (Idle after tRC)

L H H L X ILLEGAL

L H L X X ILLEGAL

L L X X X ILLEGAL

X X X X X NOP (Maintain Self-Refresh)

X X X X X INVALID

X X X X X Exit Power Down to Idle

X X X X X NOP (Maintain Self-Refresh)

X X X X X Refer to Function Truth Table

L L L H X Enter Self-Refresh

H X X X X Enter Power Down

L H H H X Enter Power Down

L H H L X ILLEGAL

L H L X X ILLEGAL

L L X X X ILLEGAL

X X X X X Refer to Current State =Power Down

X X X X X Refer to Function Truth Table

X X X X X Begin CLK Suspend at Next Cycle*3

X X X X X Exit CLK Suspend at Next Cycle*3

X X X X X Maintain CLK Suspend

ABBREVIATIONS:

H=High Level, L=Low Level, X=Don't Care

NOTES:

1. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup time must be

satisfied before any command other than EXIT.

2. Power-Down and Self-Refresh can be entered only from the All Banks Idle State.

3. Must be legal command.

MITSUBISHI ELECTRIC

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