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MSM9005 データシートの表示(PDF) - Oki Electric Industry

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MSM9005 Datasheet PDF : 30 Pages
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¡ Semiconductor
FEDL9005-03
MSM9005-xx
Command Configuration
Command
Mnemonic Operation
1 LPA
Load Pointer
Address
2 DISP
DISPlay on/off
3 CHB
4 ABBC 1/5
CHaracter Blink
on/off
ArBitrator Blink
Control 1/5 dot
5 ABB
ArBitrator Blink
6 BPC
7 AINC
8 LOT
9 SOE/D
*: Don't care
Blink Pattern
Control
Address
INCrement
Load OpTion
Serial Out
Enable/Disable
MSB
Input data
LSB
D7 D6 D5 D4 D3 D2 D1 D0
Comment
1 1 * A4 A3 A2 A1 A0 Sets address pointer value
A0, A1, A2, A3 A4: address pointer value
(binary)
Sets on/off of LCD panel
1 0 0 * 1 0 0 DI
Panel is on when DI = "1"
Panel is off when DI = "0"
Sets blink in 5 dot units
0 * * * 0 0 CB * Blink starts in 5 dot units when CB = "1"
Blink is cleared when CB = "0"
Sets writing method to arbitrator blink RAM
1 0 0 1 1 1 0 BC Writing in 1 dot unit is enabled when BC = "1"
Writing in 5 dot unit is enabled when BC = "0"
Sets start/stop of writing to arbitrator blink RAM
1 0 0 0 1 1 0 AB Writing in 1 dot unit starts when AB = "1"
Writing in 1 dot unit stops when AB = "0"
Sets blink pattern of characters
1 0 0 * 0 0 1 BP When BP = 1, all off ´ character blink
When BP = 0, all on ´ character blink
1 0 0 * 1 * 1 * Increments address pointer value by 1
1 0 1 1 * * I1 I0 Sets additional function of AINC command
Set SO pin
1 0 0 * 0 1 1 S SO pin is a CMOS output when S = "1"
SO pin is in a high impedance state when S = "0"
The commands listed above requires the wait time (21 ¥ 1/fOSC).
The address pointer value is incremented by 1 when CG ROM code data, arbitrator display data
and arbitrator blink data are input and when AINC and CHB commands are executed.
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