MSM7716 データシートの表示（PDF） - Oki Electric Industry

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MSM7716

Single Rail Linear CODEC

Oki Electric Industry 

¡ Semiconductor

MSM7716

,TIMING DIAGRAM

PCM Data Output Timing

Transmit Timing

BCLK

tXS

SYNC

12345

tSX

tWSH

6

7

8

9 10 11 12 13 14 15 16 17

tWSL

tSD

tXD1

tXD2

tXD3

PCMOUT

MSD D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14

,When tXS £ 1/2 • Fc, the Delay of the MSD bit is defined as tXD1.

When tSX < 1/2 • Fc, the Delay of the MSD bit is defined as tSD.

Receive Timing

BCLK

tRS

SYNC

1 2 3 4 5 6 7 8 9 10 11

tSR

tWSH

tWSL

12

13

14

15

16

17

tDS

tDH

PCMIN

MSD D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14

,
 , MCUInterfaceTiming

Figure 1 Basic Timing Diagram

DCLK

tCDL

DEN

CDIN

1

2

tDCL

3

4

5

tWCL tWCH

6

7

8

tCDH

9 10 11 12

tDCH

tCDS

tCDH

B7 B6 B5 B4 B3 B2 B1 B0

13

Figure 2 MCU Interface Timing Diagram

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