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¡ Semiconductor
4-stage cascade connection
Master + (slave ¥ 3)
MSM7602
NLP
HCL
ADP
ATT
GC
HD
PWDWN
RST
+5 V
Master chip
MS PD15
NLP
HCL PD 0
ADP
ATT
GC
HD
PWDWN
RST
INT IRLD
SF1 OF1
SF2 OF2
+5 V
Slave chip 1
MS PD15
NLP
HCL PD 0
ADP
ATT
GC
HD
PWDWN
RST
INT IRLD
SF1 OF1
SF2 OF2
+5 V
Slave chip 2
MS PD15
NLP
HCL PD 0
ADP
ATT
GC
HD
PWDWN
RST
INT IRLD
SF1 OF1
SF2 OF2
+5 V
Slave chip 3
MS PD15
NLP
HCL PD 0
ADP
ATT
GC
HD
PWDWN
RST
INT IRLD
SF1 OF1
SF2 OF2
Internal Clock Generator Circuit Example
MSM7602
X1/CLKIN
X2
R
C1
XTAL
C2
GND
GND
XTAL : 19.2 MHz
R : 1 MW
C1 : 27 pF
C2 : 27 pF
External Clock Input Circuit Example
MSM7602
X1/CLKIN
X2
5pF
CLK
GND
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