¡ Semiconductor
MSM66507/66P507
PIN DESCRIPTION (Continued)
Symbol
ALE
PSEN
OE
Type
O
O
I
Description
Timing pulse output pin to latch the lower 8 bits of the address output from port
0 when the CPU accesses the external memory
Strobe pulse output pin to fetch to external program memory
Normally, when P0, P1, and P7.4-P7.7 are in an output state and the OE pin is
"H" level, the ports go to a high impedance state. When OE pin is "L" level,
the ports output "H" or "L" level. However, when P0, P1, and P7.4-P7.7 are in
an input state, these ports are not under the influence of OE pin.
NMI
I
Nonmaskable interrupt request input pin
RES
RESET input pin
I
Low-active reset input pin
EA
Normally set to "H" level. If set to "L" level, the program memory goes to external
I
access mode and accesses external program memory.
VDD
I
Power supply pin
GND
I
Ground pin
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