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MP2355DN-LF-Z データシートの表示(PDF) - Monolithic Power Systems

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MP2355DN-LF-Z
MPS
Monolithic Power Systems MPS
MP2355DN-LF-Z Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
TM
MP2355 – 3A, 23V, 380KHz STEP-DOWN CONVERTER
Output Capacitor
The output capacitor is required to maintain the
DC output voltage. Ceramic, tantalum, or low
ESR electrolytic capacitors are recommended.
Low ESR capacitors are preferred to keep the
output voltage ripple low. The output voltage
ripple can be estimated by:
VOUT
=
VOUT
fS × L
×
⎜⎜⎝⎛1
VOUT
VIN
⎟⎟⎠⎞ × ⎜⎜⎝⎛RESR
+
8
×
1
fS ×
C2
⎟⎟⎠⎞
Where L is the inductor value, C2 is the output
capacitance value, and RESR is the equivalent
series resistance (ESR) value of the output
capacitor.
In the case of ceramic capacitors, the impedance
at the switching frequency is dominated by the
capacitance. The output voltage ripple is mainly
caused by the capacitance. For simplification, the
output voltage ripple can be estimated by:
VOUT
=
8
×
VOUT
fS2 × L
×
C2
×
⎜⎜⎝⎛1
VOUT
VIN
⎟⎟⎠⎞
In the case of tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the output
ripple can be approximated to:
VOUT
=
VOUT
fS × L
×
⎜⎜⎝⎛1
VOUT
VIN
⎟⎟⎠⎞ × RESR
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP2355 can be optimized for a wide range of
capacitance and ESR values.
Compensation Components
MP2355 employs current mode control for easy
compensation and fast transient response. The
system stability and transient response are
controlled through the COMP pin. COMP pin is
the output of the internal transconductance
error amplifier. A series capacitor-resistor
combination sets a pole-zero combination to
control the characteristics of the control system.
The DC gain of the voltage feedback loop is
given by:
A VDC
= RLOAD
× GCS
× A VEA
×
VFB
VOUT
Where AVEA is the error amplifier voltage gain,
400V/V; GCS is the current sense
transconductance, 3.8A/V; RLOAD is the load
resistor value.
The system has two poles of importance. One
is due to the compensation capacitor (C3) and
the output resistor of error amplifier, and the
other is due to the output capacitor and the load
resistor. These poles are located at:
fP1
=
GEA
2π × C3 × A VEA
fP2
=
1
2π × C2 × RLOAD
Where GEA is the error amplifier
transconductance, 800µA/V.
The system has one zero of importance, due to
the compensation capacitor (C3) and the
compensation resistor (R3). This zero is located
at:
f Z1
=
1
2π × C3 × R3
The system may have another zero of
importance, if the output capacitor has a large
capacitance and/or a high ESR value. The zero,
due to the ESR and capacitance of the output
capacitor, is located at:
fESR
=
1
2π × C2 × RESR
In this case (as shown in Figure 2), a third pole
set by the compensation capacitor (C6) and the
compensation resistor (R3) is used to
compensate the effect of the ESR zero on the
loop gain. This pole is located at:
fP3
=
1
2π × C6 × R3
MP2355 Rev. 1.5
www.MonolithicPower.com
8
5/1/2006
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2006 MPS. All Rights Reserved.

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