ML4826 データシートの表示（PDF） - Fairchild Semiconductor
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ML4826 Datasheet PDF : 16 Pages
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ML4826
PRODUCT SPECIFICATION
Pin Configuration
ML4826
20-Pin PDIP (P20)
IEAO 1
IAC 2
ISENSE 3
VRMS 4
SS 5
VDC 6
RTCT 7
RAMP 1 8
RAMP 2 9
DC ILIMIT 10
20 VEAO
19 VFB
18 VREF
17 VCC2
16 VCC1
15 PFC OUT
14 PWM 1
13 PWM 2
12 PGND
11 AGND
TOP VIEW
Pin Description
PIN NAME
FUNCTION
1
IEAO PFC transconductance current error amplifier output
2
I AC
PFC gain control reference input
3
ISENSE Current sense input to the PFC current limit comparator
4
VRMS Input for PFC RMS line voltage compensation
5
SS
Connection point for the PWM soft start capacitor
6
VDC
PWM voltage feedback input
7
RTCT Connection for oscillator frequency setting components
8 RAMP 1 PFC ramp input
9 RAMP 2 When in current mode, this pin functions as the current sense input; when in voltage mode,
it is the PWM input from the PFC output (feedforward ramp)
10 DC ILIMIT PWM current limit comparator input
11
AGND Analog signal ground
12
PGND Return for the PWM totem-pole outputs
13 PWM 2 PWM driver 2 output
14 PWM 1 PWM drive 1 output
15 PFC OUT PFC driver output
16
VCC2 Positive supply for the PWM drive outputs
17
VCC1 Positive supply (connected to an internal shunt regulator).
18
VREF Buffered output for the internal 7.5V reference
19
VFB
PFC transconductance voltage error amplifier input
20
VEAO PFC transconductance voltage error amplifier output
2
REV. 1.0.5 2/14/02
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