MC10E151, MC100E151
MR CLK2 CLK1 NC VCCO Q5 Q5
25 24 23 22 21 20 19
D5 26
18 Q4
D4 27
17 Q4
D3 28
16 VCC
VEE
1
15 Q3
D2 2
D1 3
D0 4
14 Q3
13 Q2
12 Q2
5 6 7 8 9 10 11
NC VCCO Q0 Q0 Q1 Q1 VCCO
* All VCC and VCCO pins are tied together on the die.
Warning: All VCC, VCCO, and VEE pins must be externally
connected to Power Supply to guarantee proper operation.
Figure 1. Pinout: PLCC−28 (Top View)
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D0 − D5
CLK1, CLK2
ECL Data Inputs
ECL Clock Inputs
MR
ECL Master Reset
Q0 − Q5, Q0 − Q5
VCC, VCCO
VEE
NC
ECL Differential Outputs
Positive Supply
Negative Supply
No Connect
D0
D
Q0
R
Q0
D1
D
Q1
R
Q1
D2
D
Q2
R
Q2
D3
D
Q3
R
Q3
D4
D
Q4
R
Q4
D5
D
Q5
R
Q5
CLK1
CLK2
MR
Figure 2. Logic Diagram
Table 2. FUNCTION TABLE
MR
Qn
1
Reset
L
0
Operational
H
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