Q0 1
Q0 2
Q1 3
MC10EP89
8 VCC
7D
6D
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D*, D*
ECL Data Inputs
Q0, Q1, Q0, Q1
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
* Pins will default LOW when left open.
Q1 4
5 VEE
Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
Table 2. ATTRIBUTES
Characteristics
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Human Body Model
Machine Model
Charged Device Model
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
SOIC−8
TSSOP−8
DFN8
Oxygen Index: 28 to 34
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Value
75 kW
N/A
> 4 kV
> 200 V
> 2 kV
Pb Pkg
Pb−Free Pkg
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
UL−94 V−0 @ 0.125 in
152 Devices
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