MC100LVEP34(2005) データシートの表示（PDF） - ON Semiconductor

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MC100LVEP34
(Rev.:2005)

2.5V / 3.3V
ECL ÷2, ÷4, ÷8 Clock Generation Chip

ON Semiconductor 

MC100LVEP34

900

800

B4 / 8

700

600

B2

500

400

300

200

100

JITTEROUT ps (RMS)

0

0

1000

2000

3000

4000

FREQUENCY (MHz)

Figure 4. Fmax/Jitter

5000

9

8

7

6

5

4

3

2

1

6000

Q

Driver

Device

Q

Zo = 50 W

Zo = 50 W

50 W

50 W

D

Receiver

Device

D

VTT

VTT = VCC − 2.0 V

Figure 5. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D − Termination of ECL Logic Devices.)

ORDERING INFORMATION

Device

Package

Shipping†

MC100LVEP34D

SOIC−16

48 Units / Rail

MC100LVEP34DR2

SOIC−16

2500 / Tape & Reel

MC100LVEP34DT

TSSOP−16*

96 Units / Rail

MC100LVEP34DTR2

TSSOP−16*

2500 / Tape & Reel

MC100LVEP34DTR2G

TSSOP−16

(Pb−Free)

2500 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.

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