![](/html/ON-Semiconductor/485852/page6.png)
850
750
650
550
450
350
250
1.0
MC100LVEP05
3.3 V
1.5
2.0
2.5
FREQUENCY (GHz)
Figure 2. Fmax @ 255C
10
9
8
7
6
5
4
3
2
1
0
3.0
Q
Driver
Device
Q
Zo = 50 W
Zo = 50 W
50 W
50 W
D
Receiver
Device
D
VTT
VTT = VCC - 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D - Termination of ECL Logic Devices.)
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