07XSC200 データシートの表示（PDF） - Freescale Semiconductor

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07XSC200

Dual High Side Switch (7.0 mOhm)

Freescale Semiconductor 

Table 3. Static Electrical Characteristics (continued)

Characteristics noted under conditions 6.0 V VPWR  20 V, 3.0 V  VDD  5.5 V, - 40 C  TA  125 C, GND = 0 V, unless

otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions, unless

otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

CONTROL INTERFACE

Input Logic High Voltage(19)

Input Logic Low Voltage(19)

Input Logic Pull-down Current (SCLK, SI)(22)

Input Logic Pull-up Current (CSB) (23)

SO, FSB Tri-state Capacitance(20)

Input Logic Pull-down Resistor (RSTB, WAKE, CLOCk and IN[0:1])

Input Capacitance(20)

Wake Input Clamp Voltage(21)

• ICL(WAKE) < 2.5 mA

VIH

2.0

VIL

-0.3

IDWN

5.0

IUP

5.0

CSO

–

RDWN

125

CIN

–

VCL(WAKE)

18

–

VDD+0.3

V

–

0.8

V

–

20

A

–

20

A

–

20

pF

250

500

k

4.0

12

pF

V

25

32

Wake Input Forward Voltage

• ICL(WAKE) = -2.5 mA

VF(WAKE)

V

- 2.0

–

- 0.3

SO High-state Output Voltage

• IOH = 1.0 mA

SO and FSB Low-state Output Voltage

• IOL = -1.0 mA

VSOH

V

VDD-0.4

–

–

VSOL

V

–

–

0.4

SO, CSNS and FSB Tri-state Leakage Current

• CSB = VIH and 0 V < VSO < VDD, or FSB = 5.5 V, or CSNS = 0.0 V

FSI External Pull-down Resistance(24)

• Watchdog Disabled

• Watchdog Enabled

ISO(LEAK)

A

- 2.0

0.0

2.0

RFS

k

–

0.0

1.0

10

Infinite

–

Notes

19. Upper and lower logic threshold voltage range applies to SI, CSB, SCLK, FSB, IN[0:1], CLOCK and WAKE input signals. The WAKE and

RSTB signals may be supplied by a derived voltage referenced to VPWR.

20. Input capacitance of SI, CSB, SCLK, RSTB, IN[0:1], CLOCK and WAKE. This parameter is guaranteed by process monitoring but is not

production tested.

21. The current must be limited by a series resistance when using voltages > 7.0 V.

22. Pull-down current is with VSI > 1.0 V and VSCLK > 1.0 V.

23. Pull-up current is with VCSB < 2.0 V. CSB has an active internal pull-up to VDD.

24. In Fail-safe HS[0:1] depends respectively on IN[0:1]. FSI has an active internal pull-up to VREG ~ 3.0 V.

Analog Integrated Circuit Device Data

Freescale Semiconductor

07XSC200

11

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