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MB91F109PF データシートの表示(PDF) - Fujitsu

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MB91F109PF
Fujitsu
Fujitsu Fujitsu
MB91F109PF Datasheet PDF : 117 Pages
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MB91F109
(Continued)
16-bit reload timer
• 3 channels
• Internal clock: 2 clock cycle resolution, divide by 2/8/32 selective
Other interval timers
• 16-bit timer: 3 channels (U-TIMER)
• PWM timer: 4 channels
• Watchdog timer: 1 channel
Bit search module
First bit transition “1” or “0” from MSB can be detected in 1 cycle
Interrupt controller
• External interrupt input: Non-maskable interrupt (NMI), normal interrupt × 4 (INT0 to INT3)
• Internal interrupt incident:UART, DMA controller (DMAC), 10-bit A/D converter, 16-bit reload-timer, PWM timer,
U-TIMER and delayed interrupt module
• Priority levels of interrupts are programmable except for non-maskable interrupt (in 16 steps)
Others
• Reset cause: Power-on reset/software reset/external reset
• Low-power consumption mode: Sleep mode/stop mode
• Clock control
Gear function: Operating clocks for CPU and peripherals are independently selective
Gear clock can be selected from 1/1, 1/2, 1/4 and 1/8 (or 1/2, 1/4, 1/8 and 1/16)
(However, operating frequency for peripherals is less than 25 MHz.)
• Packages: LQFP-100 and QFP-100
• CMOS technology (0.5 µm)
• Power supply voltage: 3.15 V 3.6 V
s PRODUCT LINEUP
Parameter
Classification
Flash size
IRAM size
CROM size
CRAM size
RAM size
I$
Other
Part number
MB91F109
Mass production products Flash
(mask ROM products)
254 Kbytes
2 Kbytes
2 Kbytes
Under trial manufacture
3

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