MB88161 データシートの表示（PDF） - Fujitsu

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MB88161

Spread Spectrum Clock Generator

Fujitsu 

MB88161

XIN

OE

VIH

VIH

Setting pin

S1, S0,

MLTP, SPRD

OUT

tLK

(lock-up time )

VIL

tLK

(lock-up time )

If the setting pin (S1, S0, MLTP, or SPRD) is used for control during normal operation, the required clock is ob-

tained at most the lock-up time “tLK” after the level at the pin is determined.

Note : The wait time for the clock signal output from the OUT pin to become stable is required after the IC is released

from power-down mode by the OE pin or after another pin’s setting is changed. During the period until the

output clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and

Cycle-Cycle jitter characteristic cannot be guaranteed. It is therefore advisable to perform processing such

as cancelling a reset of the device at the succeeding stage after the lock-up time.

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