MAX4551 データシートの表示（PDF） - Maxim Integrated
部品番号
コンポーネント説明
一致するリスト
MAX4551 Datasheet PDF : 16 Pages
| |||
±15kV ESD-Protected, Quad,
Low-Voltage, SPST Analog Switches
Test Circuits/Timing Diagrams
MAX4551
MAX4552
MAX4553
SWITCH
INPUT
VCOM
COM
LOGIC
INPUT
IN, EN
GND
0V
+5V
V+
NO
or NC
V-
-5V
SWITCH
OUTPUT
VOUT
RL
CL
300Ω
35pF
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
( ) VOUT = VCOM
RL
RL + RON
Figure 1. Switching Time
+3V
LOGIC
INPUT 0V
50%
tr < 20ns
tf < 20ns
SWITCH 0V
OUTPUT
tOFF
VOUT 0.9 · V0UT
tON
0.9 · VOUT
LOGIC INPUT WAVEFORMS INVERTED FOR EN AND SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
MAX4553
+5V
VCOM1
VCOM2
COM1
COM2
IN1, 2
V+
NO
NC
VOUT2 RL1
RL2
CL2
LOGIC
INPUT
GND
V-
-5V
RL = 300Ω
CL INCLUDES FIXTURE AND STRAY CAPACITANCE. CL = 35pF
Figure 2. Break-Before-Make Interval (MAX4553 only)
VOUT1
CL1
LOGIC +3V
INPUT
0V
SWITCH
OUTPUT 1
(VOUT1)
0V
SWITCH
OUTPUT 2
(VOUT2)
0V
50%
0.9 · V0UT1
0.9 · VOUT2
tD
tD
MAX4551
MAX4552
MAX4553
RGEN
COM
VGEN
GND
+5V
V+
NC or
NO
IN V-
VOUT
CL
VOUT
IN
OFF
∆VOUT
OFF
ON
Figure 3. Charge Injection
-5V
VIN = +3V
ON
OFF
OFF
IN
Q = (∆VOUT)(CL)
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
10 ______________________________________________________________________________________
Share Link: 