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MAX4322(1999) データシートの表示(PDF) - Maxim Integrated

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MAX4322 Datasheet PDF : 12 Pages
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Single/Dual/Quad, Low-Cost, SOT23,
Low-Power, Rail-to-Rail I/O Op Amps
with the input capacitance, can create a parasitic pole
that produces an underdamped signal response.
Reducing the input impedance or placing a small (2pF
to 10pF) capacitor across the feedback resistor
improves the response.
The MAX4322/MAX4323/MAX4326/MAX4327/MAX4329’s
inputs are protected from large differential input volt-
ages by 1kseries resistors and back-to-back triple
diodes across the inputs (Figure 2). For differential input
voltages less than 1.8V the input resistance is typically
500k. For differential input voltages greater than 1.8V
the input resistance is approximately 2k, and the input
bias current is determined by the following equation:
IBIAS
=
VDIFF - 1.8V
2k
Rail-to-Rail Output Stage
The minimum output voltage will be within millivolts of
ground for single-supply operation where the load is
referenced to ground (VEE). Figure 3 shows the input
voltage range and output voltage swing of a MAX4322
connected as a voltage follower. With a +3V supply
and the load tied to ground, the output swings from
0.00V to 2.90V. The maximum output voltage swing
depends on the load, but will be within 350mV of a +5V
supply, even with the maximum load (500to ground).
Driving a capacitive load can cause instability in most
high-speed op amps, especially those with low quies-
cent current. The MAX4322/MAX4323/MAX4326/
MAX4327/MAX4329 have a high tolerance for capaci-
tive loads. They are stable with capacitive loads up to
500pF. Figure 4 gives the stable operating region for
capacitive loads. Figures 5 and 6 show the response
with capacitive loads and the results of adding an iso-
lation resistor in series with the output (Figure 7). The
resistor improves the circuit’s phase margin by isolat-
ing the load capacitor from the op amp’s output.
R3
MAX4322/MAX4323
MAX4326/MAX4327
MAX4329
R1
R2
R3 = R1 R2
Figure 1a. Reducing Offset Error Due to Bias Current
(Noninverting)
1k
R3
MAX4322/MAX4323
MAX4326/MAX4327
MAX4329
R1
R2
R3 = R1 R2
Figure 1b. Reducing Offset Error Due to Bias Current
(Inverting)
1k
Figure 2. Input Protection Circuit
_______________________________________________________________________________________ 9

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