M38504M6-201FP データシートの表示（PDF） - MITSUBISHI ELECTRIC
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M38504M6-201FP Datasheet PDF : 52 Pages
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MITSUBISHI MICROCOMPUTERS
3850 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 14 Switching characteristics 1
(VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
Parameter
Limits
Unit
Min.
Typ. Max.
tWH (SCLK)
Serial I/O clock output “H” pulse width
tC(SCLK)/2–30
ns
tWL (SCLK)
Serial I/O clock output “L” pulse width
tC(SCLK)/2–30
ns
td (SCLK-TXD)
Serial I/O output delay time (Note 1)
140
ns
tv (SCLK-TXD)
Serial I/O output valid time (Note 1)
–30
ns
tr (SCLK)
Serial I/O clock output rising time
30
ns
tf (SCLK)
Serial I/O clock output falling time
30
ns
tr (CMOS)
CMOS output rising time (Note 2)
10 30
ns
tf (CMOS)
CMOS output falling time (Note 2)
10 30
ns
Notes 1: For tWH(SCLK), tWL(SCLK), when the P51/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
2: The XOUT pin is excluded.
Table 15 Switching characteristics 2
(VCC = 2.7 to 4.0 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Symbol
Parameter
Limits
Min.
Typ. Max.
Unit
tWH (SCLK)
tWL (SCLK)
td (SCLK-TXD)
tv (SCLK-TXD)
Serial I/O clock output “H” pulse width
Serial I/O clock output “L” pulse width
Serial I/O output delay time (Note 1)
Serial I/O output valid time (Note 1)
tC(SCLK)/2–50
tC(SCLK)/2–50
–30
ns
ns
350
ns
ns
tr (SCLK)
tf (SCLK)
tr (CMOS)
tf (CMOS)
Serial I/O clock output rising time
Serial I/O clock output falling time
CMOS output rising time (Note 2)
CMOS output falling time (Note 2)
50
ns
50
ns
20 50
ns
20 50
ns
Notes 1: For tWH(SCLK), tWL(SCLK), when the P51/TXD P-channel output disable bit of the UART control register (bit 4 of address 001B16) is “0”.
2: The XOUT pin is excluded.
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