M37272EFSP データシートの表示（PDF） - MITSUBISHI ELECTRIC

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M37272EFSP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI ELECTRIC  

MITSUBISHI MICROCOMPUTERS

M37272M6H/M8H/MAH/MFH–XXXSP/FP

M37272E8SP/FP, M37272EFSP/FP

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

6. PERFORMANCE OVERVIEW

Table 6.1 Performance Overview

Parameter

Number of basic instructions

Instruction execution time

Clock frequency

Memory size ROM M37272M6H-XXXSP/FP

M37272M8H-XXXSP/FP,M37272E8SP/FP

M37272MAH-XXXSP/FP

M37272MFH-XXXSP/FP, M37272EFSP/FP

RAM M37272M6H-XXXSP/FP

M37272M8H-XXXSP/FP,M37272E8SP/FP

M37272MAH-XXXSP/FP, M37272MFH-XXXSP/FP, M37272EFSP/FP

OSD ROM

OSD RAM

Input/Output

P0

I/O

ports

P10–P17

I/O

Functions

71

0.5 µs (the minimum instruction execution time, at 8 MHz oscillation fre-

quency)

8 MHz (maximum)

24K bytes

32K bytes

40K bytes

60K bytes

1024 bytes (ROM correction memory included)

1152 bytes (ROM correction memory included)

1472 bytes (ROM correction memory included)

10K bytes

128 bytes

8-bit ✕ 1 (N-channel open-drain output structure, can be used as PWM

output pins, INT input pins, A-D input pin)

8-bit ✕ 1 (CMOS input/output structure, however, N-channel open-drain

output structure, when P11–P14 are used as multi-master I2C-BUS inter-

face, can be used as OSD output pin, A-D input pins, INT input pin, multi-

master I2C-BUS interface)

P20–P27

I/O

8-bit ✕ 1 (P2 is CMOS input/output structure, however, N-channel open-

drain output structure when P20 and 21 are used as serial output, can be

used as serial input/output pins, timer external clock input pins, OSD clock

input/output pin, sub-clock input/output pins)

P30, P31

P50, P51

P52–P55

Serial I/O

Multi-master I2C-BUS interface

A-D comparator

PWM output circuit

Timers

ROM correction function

Subroutine nesting

Interrupt

Clock generating circuit

Data slicer

I/O

Input

Output

2-bit ✕ 1 (CMOS input/output or N-channel open-drain output structure,

can be used as A-D input pins)

2-bit ✕ 1 (can be used as OSD input pins)

4-bit ✕ 1 (CMOS output structure, can be used as OSD output pins)

8-bit ✕ 1

1 (2 systems)

6 channels (6-bit resolution)

8-bit ✕ 6

8-bit timer ✕ 6

2 vectors

128 levels (maximum)

<17 types>

INT external interrupt ✕ 3, Internal timer interrupt ✕ 6, Serial I/O interrupt ✕

1, OSD interrupt ✕ 1, Multi-master I2C-BUS interface interrupt ✕ 1, Data

slicer interrupt ✕ 1, f(XIN)/4096 interrupt ✕ 1, VSYNC interrupt ✕ 1, BRK

instruction interrupt ✕ 1, reset ✕ 1

2 built-in circuits (externally connected to a ceramic resonator or a quartz-

crystal oscillator)

Built-in

Rev. 1.0

5

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