LTC4307IMS8 データシートの表示（PDF） - Linear Technology

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LTC4307IMS8

Low Offset Hot Swappable 2-Wire Bus Buffer with Stuck Bus Recovery

Linear Technology 

BLOCK DIAGRA

Low Offset 2-Wire Bus Buffer with Stuck Low Timeout

LTC4307

SDAIN

6

100k

100k

SCLIN

3

8mA

IBOOSTSDA

CONNECT

IBOOSTSDA

8mA

SLEW RATE

DETECTOR

CONNECT

PRECHARGE

8mA

PC_CONNECT

PC_CONNECT

IBOOSTSCL

CONNECT

SLEW RATE

DETECTOR

IBOOSTSCL

8mA

SLEW RATE

DETECTOR

SLEW RATE

DETECTOR

VCC 8

SDAOUT

7

100k

100k

SCLOUT

2

+

0.55VCC

–

+

0.55VCC

–

ENABLE

1

+

1.4V –

CONNECT

30ms

TIMER

LOGIC

IBOOSTSCL

IBOOSTSDA

PC_CONNECT

UVLO

95μs

DELAY

+

– 0.55VCC

+

– 0.55VCC

READY

5

CONNECT

CONNECT

GND

4

4307 BD

OPERATION

Start-Up

When the LTC4307 first receives power on its VCC pin,

either during power-up or live insertion, it starts in an

undervoltage lockout (UVLO) state, ignoring any activity

on the SDA or SCL pins until VCC rises above 2V (typ).

This is to ensure that the LTC4307 does not try to function

until it has enough voltage to do so.

During this time, the 1V precharge circuitry is active and

forces 1V through 100k nominal resistors to the SDA

and SCL pins. Because the I/O card is being plugged

into a live backplane, the voltage on the backplane SDA

and SCL busses may be anywhere between 0V and VCC.

Precharging the SCL and SDA pins to 1V minimizes the

worst-case voltage differential these pins will see at the

4307f

7

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