LTC3531 データシートの表示（PDF） - Linear Technology
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LTC3531 Datasheet PDF : 16 Pages
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LTC3531/
LTC3531-3.3/LTC3531-3
PI FU CTIO S ThinSOT/DFN Packages
SW2 (Pin 1/Pin 7): Buck-Boost Switch Pin Where Internal
Switches C and D are Connected. An optional Schottky
diode can be connected from SW2 to VOUT for a moderate
efficiency improvement. Minimize trace length to keep
EMI down.
GND (Pin 2/Pin 3): Signal Ground for the IC.
PGND (Pin 2/Pin 8): Power Ground for the IC. (Shared
on ThinSOT version)
VOUT (Pin 3/Pin 6): Output of the Buck-Boost Synchronous
Rectifier. A filter capacitor is placed from VOUT to GND.
A ceramic bypass capacitor is recommended as close to
the VOUT and GND pins as possible.
SHDN (Pin 4/Pin 4): External Shutdown Pin. An applied
voltage of < 0.4V shuts down the converter. A voltage
above >1.4V will enable the converter.
VIN (Pin 5/Pin 2): Input Supply Pin for the Buck-Boost
Converter. A minimum 2.2μF Ceramic Capacitor should
be placed between VIN and GND.
FB (NA/Pin 5): Feedback Pin for the Adjustable Version.
Connect the resistor divider tap here. The output voltage
can be adjusted from 2V to 5V.
VOUT
=
1 . 2 25⎛⎝⎜ 1+
R2 ⎞
R1⎠⎟
SW1 (Pin 6/Pin 1): Buck-Boost Switch Pin Where Internal
Switches A and B are Connected. Connect the inductor
from SW1 to SW2.
Exposed Pad (Pin 9, DFN): Solder to PCB ground for
optimal thermal performance.
3531fb
7
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