LM431AIMX データシートの表示（PDF） - Fairchild Semiconductor
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LM431AIMX Datasheet PDF : 11 Pages
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Physical Dimensions (Continued)
8-SOIC
6.20
5.80
5.00
4.80
3.81
8
A
5
B
4.00
3.80
1.75
0.65
5.60
PIN ONE
1
INDICATOR
(0.33)
0.25
0.10
1.75 MAX
4
1.27
0.25
CBA
1.27
LAND PATTERN RECOMMENDATION
SEE DETAIL A
0.25
C
0.19
R0.10
R0.10
8°
0°
0.90
0.40
0.51
0.33
0.10
OPTION A - BEVEL EDGE
0.50
0.25
x 45°
GAGE PLANE
0.36
OPTION B - NO BEVEL EDGE
NOTES: UNLESS OTHERWISE SPECIFIED
SEATING PLANE
(1.04)
DETAIL A
SCALE: 2:1
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FILENAME: M08Arev14
F) FAIRCHILD SEMICONDUCTOR.
Figure 19. 8-Lead, SOIC, JEDEC MS 0-12, 0.150 inch Narrow Body
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/products/discrete/pdf/soic8_tr.pdf.
© 2003 Fairchild Semiconductor Corporation
LM431A / LM431B / LM431C Rev. 1.2.0
10
www.fairchildsemi.com
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