LIS3L02AQ3
Table 2. Pin Description
N°
Pin
Function
1 to 3
NC
Internally not connected
4
GND
0V supply
5
Vdd
Power supply
6
Vouty Output Voltage, y-channel
7
ST
Self Test (Logic 0: normal mode; Logic 1: Self-test)
8
Voutx Output Voltage, x-channel
9-13
NC
Internally not connected
14
PD
Power Down (Logic 0: normal mode; Logic 1: Power-Down mode)
15
Voutz Output Voltage, z-channel
16
FS
Full Scale selection (Logic 0: ±2g Full-scale; Logic 1: ±6g Full-scale)
17-18 Reserved Leave unconnected
19
Reserved Leave unconnected
20
Reserved Leave unconnected
21
22-23
NC
Internally not connected
Reserved Leave unconnected
24-25
NC
Internally not connected
26
Reserved Connect to Vdd or GND
27
Reserved Leave unconnected or connect to Vdd
28
29-44
Reserved Leave unconnected or connect to GND
NC
Internally not connected
Figure 3. Pin Connection (Top view)
Z
1
Y
X
DIRECTION OF THE
DETECTABLE
ACCELERATIONS
NC
NC
NC
GND
Vdd
Vouty
ST
Voutx
NC
NC
NC
LIS3L02AQ3
NC
NC
NC
NC
NC
Reserved
Reserved
Reserved
NC
NC
Reserved
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