L6382D5 データシートの表示（PDF） - STMicroelectronics

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L6382D5

Power management unit for microcontrolled ballast

STMicroelectronics 

Block description

L6382D5

6.3

Drivers

● LSD (Low Side Driver): it consists of a level shifter from 5V logic signal (LSI) to Vcc

MOS driving level; conceived for the half-bridge low-side power MOS, it is able to

source and sink 120mA (min).

● HSD (Level Shifter and High Side Driver): it consists of a level shifter from 5V logic

signal (HSI) to the high side gate driver input up to 600V. Conceived for the half-bridge

high-side power MOS, the HSD is able to source and sink 120mA.

● PFD (Power Factor Driver): it consists of a level shifter from 5V logic signal (PFI) to Vcc

MOS driving level: the driver is able to source 120mA from VCC to PFG (turn-on) and to

sink 250mA to GND (turn-off); it is suitable to drive the MOS of the PFC pre-regulator

stage.

● HED (Heat Driver): it consists of a level shifter from 5V logic signal (HEI) to Vcc MOS

driving level; the driver is able to source 30mA from Vcc to HEG and to sink 75mA to

GND and it is suitable for the filament heating when they are supplied by independent

winding.

● Bootstrap Circuit: it generates the supply voltage for the high side Driver (HSD). This

circuit sources current from VCC to PIN HSB when LSG in ON. A patented integrated

bootstrap section replaces an external bootstrap diode. This section together with a

bootstrap capacitor provides the bootstrap voltage to drive the high side power

MOSFET. This function is achieved using a high voltage DMOS driver which is driven

synchronously with the low side external power MOSFET. For a safe operation, current

flow between BOOT pin and Vcc is always inhibited, even though ZVS operation may

not be ensured.

6.4

Internal logic, over current protection (OCP) and interlocking

function

The DIM (Digital Input Monitor) block manages the input signals delivered to the drivers

ensuring that they are low during the described start-up procedure; the DIM block controls

the L6382D5 behaviour during both save and operating modes.

When the voltage on pin CSI overcomes the internal reference of 0.54V (typ.) the block

latches the fault condition: in this state the OCP block forces low both HSG and LSG signals

while CSO will be forced high. This condition remains latched until LSI and HSI are

simultaneously low and CSI is below 0.54V.

This function is suitable to implement an over current protection or hard-switching detection

by using an external sense resistor.

As the voltage on pin CSI can go negative, the current must be limited below 2mA by

external components.

Another feature of the DIM block is the internal interlocking that avoids cross-conduction in

the half-bridge FET's: if by chance both HSI and LSI input's are brought high at the same

time, then LSG and HSG are forced low as long as this critical condition persists.

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