KSZ8993F データシートの表示（PDF） - Micrel

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KSZ8993F

Single Chip Fast Ethernet Media Converter with TS-1000 OAM

Micrel 

Micrel, Inc.

KS8993F/FL

Table Of Contents

1 Signal Description.........................................................................................................................9

1.1 KS8993F Pin Diagram ........................................................................................................................................................... 9

1.2 Pin Description and I/O Assignment .................................................................................................................................... 10

2 Functional Description ................................................................................................................20

2.1 Overview .............................................................................................................................................................................. 20

2.2 Media Converter Function.................................................................................................................................................... 20

2.2.1 OAM (Operations, Administration, and Management) Frame Format ..................................................................... 20

2.2.2 MC (Media Converter) Mode ................................................................................................................................... 22

2.2.3 MC Loop Back Function .......................................................................................................................................... 22

2.2.4 Registers for Media Converter Functions ................................................................................................................ 23

2.2.5 Unique I/O Feature Definition .................................................................................................................................. 23

2.2.6 Port 1 LED Indicator Definition ................................................................................................................................ 24

2.2.7 Port 2 LED Indicator Definition ................................................................................................................................ 24

2.3 Physical Transceiver ............................................................................................................................................................ 25

2.3.1 100BASE-TX Transmit ............................................................................................................................................ 25

2.3.2 100BASE-TX Receive ............................................................................................................................................. 25

2.3.3 PLL Clock Synthesizer ............................................................................................................................................ 25

2.3.4 Scrambler/De-scrambler (100BASE-TX only) ......................................................................................................... 25

2.3.5 100BASE-FX Operation and Signal Detection ........................................................................................................ 25

2.3.6 100BASE-FX Far-End Fault (FEF) .......................................................................................................................... 26

2.3.7 10BASE-T Transmit and Receive............................................................................................................................ 26

2.3.8 Power Management................................................................................................................................................. 27

2.3.9 Auto MDI/MDI-X Crossover ..................................................................................................................................... 27

2.3.10 Auto Negotiation ...................................................................................................................................................... 29

2.4 MAC and Switch Function .................................................................................................................................................... 29

2.4.1 Address Look Up ..................................................................................................................................................... 29

2.4.2 Learning................................................................................................................................................................... 30

2.4.3 Migration.................................................................................................................................................................. 30

2.4.4 Aging ....................................................................................................................................................................... 30

2.4.5 Forwarding............................................................................................................................................................... 30

2.4.6 Switching Engine ..................................................................................................................................................... 33

2.4.7 MAC operation......................................................................................................................................................... 33

2.4.8 Back-off Algorithm ................................................................................................................................................... 33

2.4.9 Late Collision ........................................................................................................................................................... 33

2.4.10 Illegal Frames .......................................................................................................................................................... 33

2.4.11 Flow Control ............................................................................................................................................................ 33

2.4.12 Half Duplex Back Pressure...................................................................................................................................... 34

2.4.13 Broadcast Storm Protection..................................................................................................................................... 34

2.5 MII Interface Operation ........................................................................................................................................................ 34

2.6 SNI (7-wire) Interface Operation .......................................................................................................................................... 35

2.7 MII Management Interface (MIIM) ........................................................................................................................................ 36

2.8 Serial Management Interface (SMI) ..................................................................................................................................... 36

2.9 Advanced Switch Function................................................................................................................................................... 37

2.9.1 Port Mirroring Support ............................................................................................................................................. 37

2.9.2 IEEE 802.1Q VLAN support .................................................................................................................................... 38

2.9.3 QoS Priority ............................................................................................................................................................. 39

2.9.4 Rate Limit Support................................................................................................................................................... 41

2.10 Configuration Interface......................................................................................................................................................... 41

2.10.1 I2C Master Serial Bus Configuration ........................................................................................................................ 42

2.10.2 I2C Slave Serial Bus Configuration .......................................................................................................................... 43

2.10.3 SPI Slave Serial Bus Configuration ......................................................................................................................... 43

3 MII Management (MIIM) Registers .............................................................................................47

Register 0: MII Basic Control .............................................................................................................................................. 47

Register 1: MII Basic Status................................................................................................................................................ 48

Register 2: PHYID HIGH ..................................................................................................................................................... 48

Register 3: PHYID LOW...................................................................................................................................................... 48

Register 4: Auto-Negotiation Advertisement Ability ............................................................................................................ 49

June 2009

4

M9999-062509

hbwhelp@micrel.com or (408) 955-1690

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