KSZ8842-PMQL データシートの表示（PDF） - Micrel
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KSZ8842-PMQL Datasheet PDF : 119 Pages
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Micrel, Inc.
Pin
Number
11
12
Pin
Name
NC
PCLK
13
NC
14
NC
15
NC
16
INTRN
17
NC
18
NC
19
EECS
20
NC
21
NC
22
P2LED3
23
DGND
24
VDDCO
25
NC
26
EEEN
27
P1LED3
28
EEDO
29
EESK
30
EEDI
31
NC
32
VDDIO
33
VDDIO
34
DGND
35
DGND
36
PWRDN
37
AGND
38
VDDA
39
AGND
40
NC
KSZ8842-PMQL/PMBL
Type
Pin Function
—
No connect
Ipd PCI Bus Clock
This Clock provides the timing for all PCI bus phases. The rising edge defines the start
of each phase. The clock maximum frequency is 33MHz.
—
No connect
—
No connect
—
No connect
Opd Interrupt Request
Active Low signal to host CPU to request an interrupt when any one of the interrupt
conditions occurs in the registers. This pin should be pull-up externally.
—
No connect
—
No connect
Opu EEPROM Chip Select
This signal is used to select an external EEPROM device
—
No connect
—
No connect
Opd Port 2 LED Indicator
See the description in pins 6, 7, and 8.
Gnd Digital IO Ground
P
1.2V Core Voltage Output. (Internal 1.2V LDO power supply output)
This pin is used to provide 1.2V power supply to all 1.2V power VDDC, VDDA and
VDDAP. It is recommended the pin should be connected to 3.3V power rail by a
100ohm resistor for the internal LDO application.
—
No connect
Ipd EEPROM Enable
EEPROM is enabled and connected when this pin is pull-up.
EEPROM is disabled when this pin is pull-down or no connect.
Opd Port 1 LED Indicator
See the description in pins 3, 4, and 5.
Opd EEPROM Data Out
This pin is connected to DI input of the serial EEPROM.
Opd EEPROM Serial Clock
4µs serial clock to load configuration data from the serial EEPROM.
Ipd EEPROM Data In
This pin is connected to DO output of the serial EEPROM.
—
No connect
P
3.3V digital I/O VDD.
P
3.3V digital I/O VDD.
Gnd Digital ground
Gnd Digital ground
Ipu Full-chip power-down input. Active Low.
Gnd Analog ground
P
1.2V analog VDD
Gnd Analog ground
—
No connect
October 2007
12
M9999-100207-1.5
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