K4X56163PI-L(F)E/GC6 データシートの表示（PDF） - Samsung

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K4X56163PI-L(F)E/GC6

16Mx16 Mobile DDR SDRAM

Samsung 

K4X56163PI - L(F)E/G

Mobile DDR SDRAM

12. DC CHARACTERISTICS

Recommended operating conditions (Voltage referenced to VSS = 0V, Tc = -25 to 85°C)

Parameter

Symbol

Test Condition

DDR333 DDR266 Unit Note

Operating Current

(One Bank Active)

tRC=tRCmin; tCK=tCKmin; CKE is HIGH; CS is HIGH between valid com-

IDD0 mands; address inputs are SWITCHING; data bus inputs are STABLE

50

45

mA

all banks idle, CKE is LOW; CS is HIGH, tCK = tCKmin;

Precharge Standby Current IDD2P address and control inputs are SWITCHING; data bus inputs are STABLE

0.3

in power-down mode

all banks idle, CKE is LOW; CS is HIGH, CK = LOW, CK = HIGH;

IDD2PS address and control inputs are SWITCHING; data bus inputs are STABLE

0.3

mA

all banks idle, CKE is HIGH; CS is HIGH, tCK = tCKmin;

Precharge Standby Current IDD2N address and control inputs are SWITCHING; data bus inputs are STABLE 15

in non power-down mode

all banks idle, CKE is HIGH; CS is HIGH, CK = LOW, CK = HIGH;

IDD2NS address and control inputs are SWITCHING; data bus inputs are STABLE

8

12

mA

8

one bank active, CKE is LOW; CS is HIGH, tCK = tCKmin;

Active Standby Current

IDD3P address and control inputs are SWITCHING; data bus inputs are STABLE

5

in power-down mode

one bank active, CKE is LOW; CS is HIGH, CK = LOW, CK = HIGH;

mA

IDD3PS address and control inputs are SWITCHING; data bus inputs are STABLE

2

Active Standby Current

one bank active, CKE is HIGH; CS is HIGH, tCK = tCKmin;

IDD3N address and control inputs are SWITCHING; data bus inputs are STABLE 25

in non power-down mode

(One Bank Active)

one bank active, CKE is HIGH; CS is HIGH, CK = LOW, CK = HIGH;

IDD3NS address and control inputs are SWITCHING; data bus inputs are STABLE 20

25

mA

20

Operating Current

(Burst Mode)

one bank active; BL=4; CL=3; tCK = tCKmin; continuous read bursts;

IDD4R I OUT =0 mA;

110

95

address inputs are SWITCHING; 50% data change each burst transfer

mA

one bank active; BL = 4; tCK = tCKmin ; continuous write bursts;

IDD4W address inputs are SWITCHING; 50% data change each burst transfer

90

75

Refresh Current

tRC = tRFCmin ; tCK = tCKmin ; burst refresh; CKE is HIGH;

IDD5 address and control inputs are SWITCHING; data bus inputs are STABLE 100

85

mA

Self Refresh Current

IDD6

CKE is LOW; t CK = t CKmin ;

Extended Mode Register set to all 0’s;

address and control inputs are STABLE;

data bus inputs are STABLE

Deep Power Down Current IDD8 Deep Power Down Mode Current

Parameter

Full Array

-E

1/2 Array

1/4 Array

Full Array

-G

1/2 Array

1/4 Array

451)

85

200

450

160

300

140

250

150

300

135

250

130

225

10

°C

uA

uA 2

NOTE :

1) It has +/- 5°C tolerance.

2) DPD(Deep Power Down) function is an optional feature, and it will be enabled upon request.

Please contact Samsung for more information.

3) IDD specifications are tested after the device is properly intialized.

4) Input slew rate is 1V/ns.

5) Definitions for IDD: LOW is defined as VIN ≤ 0.1 * VDDQ ;

HIGH is defined as VIN ≥ 0.9 * VDDQ ;

STABLE is defined as inputs stable at a HIGH or LOW level ;

SWITCHING is defined as: - address and command: inputs changing between HIGH and LOW once per two clock cycles ;

- data bus inputs: DQ changing between HIGH and LOW once per clock cycle; DM and DQS are STABLE.

- 14 -

October 2007

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