84052IAZ データシートの表示（PDF） - Intersil

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84052IAZ

Low Voltage, Single and Dual Supply, 8 to 1 Multiplexer, Dual 4 to 1 Multiplexer and a Triple SPDT Analog Switch

Intersil 

ISL84051, ISL84052, ISL84053

Test Circuits and Waveforms

V+

C

C

V-

C

V+

LOGIC

INPUT

NO0

ISL84051

NO1-NO7

COM

INH

GND ADDA-C

VOUT

RL

300Ω

CL

35pF

3V

LOGIC

INPUT

0V

50%

tON

tr < 20ns

tf < 20ns

SWITCH

OUTPUT 0V

tOFF

90% VOUT

90%

Logic input waveform is inverted for switches that have the opposite

logic sense.

C

V+

LOGIC

INPUT

C

V+

LOGIC

INPUT

V+

C

V-

C

NO0

ISL84052

NO1-NO3

COM

INH

GND ADDA-B

VOUT

RL

300Ω

CL

35pF

V+

C

V-

C

NCX

NOX

INH

ISL84053

COMX

GND ADDX

VOUT

RL

300Ω

CL

35pF

Repeat test for other switches. CL includes fixture and stray

capacitance.

VOUT

=

V(NO or NC)

---------R-----L---------

RL + rON

FIGURE 1A. INHIBIT tON/tOFF MEASUREMENT POINTS

FIGURE 1B. INHIBIT tON/tOFF TEST CIRCUIT

FIGURE 1. SWITCHING TIMES

8

FN6047.8

October 2, 2007

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