IS61LV2568L データシートの表示（PDF） - Integrated Silicon Solution

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IS61LV2568L

256K x 8 HIGH-SPEED CMOS STATIC RAM

Integrated Silicon Solution 

PACKAGING INFORMATION

400-mil Plastic SOJ

Package Code: K

N

1

D

e

N/2+1

E1

N/2

Notes:

1. Controlling dimension:

millimeters.

2. BSC = Basic lead spacing

between centers.

3. Dimensions D and E1 do not

include mold flash protrusions

E

and should be measured from

the bottom of the package.

4. Reference document: JEDEC

MS-027.

SEATING PLANE

A

b

C

A2

B

A1

E2

Millimeters

Inches

Symbol Min Max Min Max

No. Leads (N)

28

A

3.25 3.75 0.128 0.148

A1

0.64 —

0.025 —

A2

2.08 —

0.082 —

B

0.38 0.51 0.015 0.020

b

0.66 0.81 0.026 0.032

C

0.18 0.33 0.007 0.013

D 18.29 18.54 0.720 0.730

E 11.05 11.30 0.435 0.445

E1 10.03 10.29 0.395 0.405

E2

9.40 BSC

0.370 BSC

e

1.27 BSC

0.050 BSC

Millimeters

Min Max

32

3.25 3.75

0.64 —

2.08 —

0.38 0.51

0.66 0.81

0.18 0.33

20.82 21.08

11.05 11.30

10.03 10.29

9.40 BSC

1.27 BSC

Inches

Min Max

0.128 0.148

0.025 —

0.082 —

0.015 0.020

0.026 0.032

0.007 0.013

0.820 0.830

0.435 0.445

0.395 0.405

0.370 BSC

0.050 BSC

Millimeters

Inches

Min Max Min Max

36

3.25 3.75 0.128 0.148

0.64 —

0.025 —

2.08 —

0.082 —

0.38 0.51 0.015 0.020

0.66 0.81 0.026 0.032

0.18 0.33 0.007 0.013

23.37 23.62 0.920 0.930

11.05 11.30 0.435 0.445

10.03 10.29 0.395 0.405

9.40 BSC

0.370 BSC

1.27 BSC

0.050 BSC

Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to

obtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

Rev. F

10/29/03

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