IS42RM データシートの表示（PDF） - Integrated Silicon Solution
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IS42RM Datasheet PDF : 33 Pages
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Table2: Pin Descriptions
Pin
Pin Name
CLK
System Clock
CKE
/CS
BA0~BA1
Clock Enable
Chip Select
Bank Address
A0~A11
/RAS, /CAS, /WE
LDQM,UDQM
DQ0~DQ15
VDD/VSS
VDDQ/VSSQ
NC
Address
Row Address Strobe,
Column Address Strobe,
Write Enable
Data Input/Output Mask
Data Input/Output
Power Supply/Ground
Data Output Power/Ground
No Connection
IS42SM/RM/VM16400K
Descriptions
The system clock input. All other inputs are registered to the
SDRAM on the rising edge CLK.
Controls internal clock signal and when deactivated, the SDRAM
will be one of the states among power down, suspend or self
refresh.
Enable or disable all inputs except CLK, CKE and DQM.
Selects bank to be activated during RAS activity.
Selects bank to be read/written during CAS activity.
Row Address
Column Address
Auto Precharge
: RA0~RA11
: CA0~CA7
: A10
RAS, CAS and WE define the operation.
Refer function truth table for details.
Controls output buffers in read mode and masks input data in
write mode.
Data input/output pin.
Power supply for internal circuits and input buffers.
Power supply for output buffers.
No connection.
Rev. A | August 2012
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