IDT82V2088 データシートの表示（PDF） - Integrated Device Technology
部品番号
コンポーネント説明
メーカー
IDT82V2088
Integrated Device Technology
IDT82V2088 Datasheet PDF : 78 Pages
| |||
OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT
INDUSTRIAL
TEMPERATURE RANGES
Table-1 Pin Description (Continued)
Name
DS/RD
Type
Input
Pin No.
PQFP208 PBGA208
47
N3
Description
DS: Data Strobe
In parallel Motorola microcontroller interface mode, signal on this pin is the data strobe of the parallel
interface. During a write operation (R/W =0), data on D[7:0] is sampled into the device. During a read
operation (R/W =1), data is output to D[7:0] from the device.
SDI/R/W/WR Input
48
RD: Read Operation
In parallel Intel microcontroller interface mode, this pin is asserted low by the microcontroller to initiate
a read cycle. Data is output to D[7:0] from the device during a read operation.
P1
SDI: Serial Data Input
In serial microcontroller interface mode, data is input on this pin. Input data is sampled on the rising
edges of SCLK.
R/W: Read/Write Select
In parallel Motorola microcontroller interface mode, this pin is low for write operation and high for read
operation.
SDO
Output
49
INT
Output
50
D7
24
D6
25
D5
26
D4
I/O
27
D3
28
D2
29
D1
30
D0
31
A7
37
A6
38
A5
39
A4
Input
40
A3
41
A2
42
A1
43
A0
44
RST
Input
51
THZ
Input
10
REF
Input
59
WR: Write Operation
In parallel Intel microcontroller interface mode, this pin is asserted low by the microcontroller to initiate
a write cycle. Data on D[7:0] is sampled into the device during a write operation.
P2
SDO: Serial Data Output
In serial microcontroller interface mode, signal on this pin is the output data of the serial interface. Con-
figuration and status data on pin SDO is clocked out of the device on the active edge of SCLK.
R1
INT: Interrupt Request
This pin outputs the general interrupt request for all interrupt sources. If INTM_GLB bit (GCF0, 40H)
is set to ‘1’, all interrupt sources will be masked. And these interrupt sources also can be masked indi-
vidually via registers (INTM0, 11H) and (INTM1, 12H). Interrupt status is reported via byte INT_CH
(INTCH, 80H), registers (INTS0, 16H) and (INTS1, 17H).
Output characteristics of this pin can be defined to be push-pull (active high or low) or be open-drain
(active low) by bits INT_PIN[1:0] (GCF0, 40H).
H3
Dn: Data Bus 7~0
H2
These pins function as a bi-directional data bus of the microcontroller interface.
J1
J2
J3
J4
K3
K2
L1
An: Address Bus 7~0
L2
These pins function as an address bus of the microcontroller interface.
L3
L4
M4
M3
M2
M1
P3
RST: Hardware Reset
The chip is reset if a low signal is applied on this pin for more than 100ns. All the drivers output are in
high impedance state, all the internal flip-flops are reset and all the registers are initialized to their
default values.
E4
THZ: Transmit Driver Enable
This pin enables or disables all transmitter drivers on a global basis. A low level on this pin enables the
drivers while a high level turns all drivers into high impedance state. Note that functionality of internal
circuits is not affected by signal on this pin.
T1
REF: Reference Resistor
An external resistor (3 KΩ, 1%) is used to connect this pin to ground to provide a standard reference
current for internal circuit.
13
Share Link: