IDT70V24L20GI データシートの表示（PDF） - Integrated Device Technology
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IDT70V24L20GI Datasheet PDF : 22 Pages
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IDT70V24S/L
High-Speed 4K x 16 Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
Truth Table III Interrupt Flag(1)
Left Port
Right Port
R/WL
CEL
OEL
A11L-A0L
INTL
R/WR
CER
OER
A11R-A0R
INTR
Function
L
L
X
FFF
X
X
X
X
X
L(2) Set Right INTR Flag
X
X
X
X
X
X
L
L
FFF
H(3) Reset Right INTR Flag
X
X
X
X
L(3)
L
L
X
FFE
X Set Left INTL Flag
X
L
L
FFE
H(2)
X
X
X
X
X Reset Left INTL Flag
NOTES:
1. Assumes BUSYL = BUSYR = VIH.
2. If BUSYL = VIL, then no change.
3. If BUSYR = VIL, then no change.
2911 tbl 15
Truth Table IV Address BUSY
Arbitration
Inputs
Outputs
CEL CER
A0L-A11L
A0R-A11R
BUSYL(1) BUSYR(1)
Function
X X NO MATCH
H
H
Normal
HX
MATCH
H
H
Normal
XH
MATCH
H
H
Normal
LL
MATCH
(2)
(2)
Write Inhibit(3)
NOTES:
2911 tbl 16
1. Pins BUSYL and BUSYR are both outputs when the part is configured as a master. Both are inputs when configured as a slave. BUSY outputs on the IDT70V24 are push
pull, not open drain outputs. On slaves the BUSY input internally inhibits writes.
2. L if the inputs to the opposite port were stable prior to the address and enable inputs of this port. VIH if the inputs to the opposite port became stable after the address and
enable inputs of this port. If tAPS is not met, either BUSYL or BUSYR = LOW will result. BUSYL and BUSYR outputs cannot be LOW simultaneously.
3. Writes to the left port are internally ignored when BUSYL outputs are driving LOW regardless of actual logic level on the pin. Writes to the right port are internally ignored when
BUSYR outputs are driving LOW regardless of actual logic level on the pin.
Truth Table V Example of Semaphore Procurement Sequence(1,2,3)
Functions
D0 - D15 Left
D0 - D15 Right
Status
No Action
1
1
Semaphore free
Left Port Writes "0" to Semaphore
0
1
Left port has semaphore token
Right Port Writes "0" to Semaphore
0
1
No change. Right side has no write access to semaphore
Left Port Writes "1" to Semaphore
1
0
Right port obtains semaphore token
Left Port Writes "0" to Semaphore
1
0
No change. Left port has no write access to semaphore
Right Port Writes "1" to Semaphore
0
1
Left port obtains semaphore token
Left Port Writes "1" to Semaphore
1
1
Semaphore free
Right Port Writes "0" to Semaphore
1
0
Right port has semaphore token
Right Port Writes "1" to Semaphore
1
1
Semaphore free
Left Port Writes "0" to Semaphore
0
1
Left port has semaphore token
Left Port Writes "1" to Semaphore
1
1
Semaphore free
NOTES:
1. This table denotes a sequence of events for only one of the eight semaphores on the IDT70V24.
2. There are eight semaphore flags written to via I/O0 and read from all I/O's (I/O0-I/O15). These eight semaphores are addressed by A0-A2.
3. CE = VIH, SEM = VIL to access the semaphores. Refer to the Semaphore Read/Write Control Truth Table.
2911 tbl 17
61.482
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