IDT7024L(2018) データシートの表示（PDF） - Integrated Device Technology
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IDT7024L Datasheet PDF : 22 Pages
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IDT7024S/L
High-Speed 4K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
AC Electrical Characteristics Over the
Operating Temperature and Supply Voltage(5)
7024X15
Com'l Only
7024X17
Com'l Only
Symbol
Parameter
WRITE CYCLE
tWC
Write Cycle Time
tEW
Chip Enable to End-of-Write(3)
tAW
Address Valid to End-of-Write
tAS
Address Set-up Time(3)
tWP
Write Pulse Width
tWR
Write Recovery Time
tDW
Data Valid to End-of-Write
tHZ
Output High-Z Time(1,2)
tDH
Data Hold Time(4)
tWZ
Write Enab le to Output in High-Z(1,2)
tOW
Output Active from End-of-Write(1,2,4)
tSWRD
SEM Flag Write to Read Time
tSPS
SEM Flag Contention Window
Min.
Max.
Min.
Max.
15
____
17
____
12
____
12
____
12
____
12
____
0
____
0
____
12
____
12
____
0
____
0
____
10
____
10
____
____
10
____
10
0
____
0
____
____
10
____
10
0
____
0
____
5
____
5
____
5
____
5
____
7024X20
Com'l, Ind
& Military
Min.
Max.
20
____
15
____
15
____
0
____
15
____
0
____
15
____
____
12
0
____
____
12
0
____
5
____
5
____
7024X25
Com'l &
Military
Min.
Max. Unit
25
____
ns
20
____
ns
20
____
ns
0
____
ns
20
____
ns
0
____
ns
15
____
ns
____
15
ns
0
____
ns
____
15
ns
0
____
ns
5
____
ns
5
____
ns
2740 tbl 13a
Symbol
Parameter
WRITE CYCLE
tWC
Write Cycle Time
tEW
Chip Enable to End-of-Write(3)
tAW
Address Valid to End-of-Write
tAS
Address Set-up Time(3)
tWP
Write Pulse Width
tWR
Write Recovery Time
tDW
Data Valid to End-of-Write
tHZ
Output High-Z Time(1,2)
tDH
Data Hold Time(4)
tWZ
Write Enab le to Output in High-Z(1,2)
tOW
Output Active from End-of-Write(1,2,4)
tSWRD
SEM Flag Write to Read Time
tSPS
SEM Flag Contention Window
7024X35
Com'l &
Military
Min.
Max.
7024X55
Com'l, Ind
& Military
Min.
Max.
35
____
55
____
30
____
45
____
30
____
45
____
0
____
0
____
25
____
40
____
0
____
0
____
15
____
30
____
____
15
____
25
0
____
0
____
____
15
____
25
0
____
0
____
5
____
5
____
5
____
5
____
NOTES:
1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization, but is not production tested.
3. To access RAM, CE = VIL, UB or LB = VIL, SEM = VIH. To access semaphore, CE = VIH or UB & LB = VIH, and SEM = VIL.
Either condition must be valid for the entire tEW time.
4. The specification for tDH must be met by the device supplying write data to the RAM under all operating conditions. Although tDH
and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW.
5. 'X' in part number indicates power rating (S or L).
7024X70
Military Only
Min.
Max. Unit
70
____
ns
50
____
ns
50
____
ns
0
____
ns
50
____
ns
0
____
ns
40
____
ns
____
30
ns
0
____
ns
____
30
ns
0
____
ns
5
____
ns
5
____
ns
2740 tbl 13b
61.402
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