IDT5V2528/A
2.5 / 3.3V PHASE-LOCK LOOP CLOCK DRIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUIT AND VOLTAGE WAVEFORMS
From Output
Under Test
CL=30pF(2)
500Ω
Test Circuit for 3.3V Outputs
From Output
Under Test
CL=20pF(2)
500Ω
Test Circuit for 2.5V Outputs
CF (4)
CLK
Y, TY
IDT5V2528/A
500Ω
FBIN
PCBTRACE
CL (2)
FBOUT
CLK
FBIN
500Ω
on each Y,
TY output
FBOUT
or
Any Y, TY (3.3V)
Any Y, TY (3.3V)
Any TY (2.5V)
Any TY (2.5V)
VDD/2
VDD/2
tPHASE ERROR
VDDQ/2
tR
VDDQ/2
tSK1(o)
VDDQ/2
tR
VDDQ/2
tSK2(o)
PHASE ERROR AND SKEW CALCULATIONS(3,4)
tF
VDDQ/2
tSK3(o)
tF
VDDQ/2
80%
20%
80%
20%
NOTES:
1. All inputs pulses are supplied by generators having the following characteristics: PRR ≤ 100MHz ZO = 50Ω, tR ≤ 1.2 ns, tF ≤ 1.2 ns.
2. CL includes probe and jig capacitance.
3. The outputs are measured one at a time with one transition per measurement.
4. Phase error measurements require equal loading at outputs Y, TY, and FBOUT. CF = CL – CFBIN – CPCBtrace; CFBIN ≅ 5pF.
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