IDT2308 データシートの表示（PDF） - Integrated Device Technology

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IDT2308

3.3V ZERO DELAY CLOCK MULTIPLIER

Integrated Device Technology 

IDT2308

3.3V ZERO DELAY CLOCK MULTIPLIER

PIN CONFIGURATION

REF

1

CLKA1

2

CLKA2

3

VDD

4

GND

5

CLKB1

6

CLKB2

7

S2

8

16

FBK

15

CLKA4

14

CLKA3

13

VDD

12

GND

11 CLKB4

10

CLKB3

9

S1

SOIC/ TSSOP

TOP VIEW

PIN DESCRIPTION

Pin Number Functional Description

REF (1)

1

Input Reference Clock, 5 Volt Tolerant Input

CLKA1(2)

2

Clock Output for Bank A

CLKA2(2)

3

Clock Output for Bank A

VDD

4

3.3V Supply

GND

5

Ground

CLKB1(2)

6

Clock Output for Bank B

CLKB2(2)

7

Clock Output for Bank B

S2(3)

8

Select Input, Bit 2

S1(3)

9

Select Input, Bit 1

CLKB3(2)

10

Clock Output for Bank B

CLKB4(2)

11

Clock Output for Bank B

GND

12

Ground

VDD

13

CLKA3(2)

14

3.3V Supply

Clock Output for Bank A

CLKA4(2)

15

Clock Output for Bank A

FBK

16

PLL Feedback Input

NOTES:

1. Weak pull down.

2. Weak pull down on all outputs.

3. Weak pull ups on these inputs.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES

ABSOLUTE MAXIMUM RATINGS(1)

Symbol

Rating

Max.

Unit

VDD

Supply Voltage Range

–0.5 to +4.6 V

VI (2)

Input Voltage Range (REF)

–0.5 to +5.5 V

VI

Input Voltage Range

–0.5 to

V

(except REF)

VDD+0.5

IIK (VI < 0)

Input Clamp Current

–50

mA

IOK

Terminal Voltage with Respect

±50

mA

(VO < 0 or VO > VDD) to GND (inputs VIH 2.5, VIL 2.5)

IO

Continuous Output Current

±50

mA

(VO = 0 to VDD)

VDD or GND

Continuous Current

±100

mA

TA = 55°C

Maximum Power Dissipation

0.7

W

(in still air)(3)

TSTG

StorageTemperatureRange –65 to +150 °C

Operating

Commercial Temperature

0 to +70 °C

Temperature

Range

Operating

Industrial Temperature

-40 to +85 °C

Temperature

Range

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the

operational sections of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

2. The input and output negative-voltage ratings may be exceeded if the input and output

clamp-current ratings are observed.

3. The maximum package power dissipation is calculated using a junction temperature

of 150°C and a board trace length of 750 mils.

APPLICATIONS:

• SDRAM

• Telecom

• Datacom

• PC Motherboards/Workstations

• Critical Path Delay Designs

2

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