ICS94206F-T データシートの表示（PDF） - Integrated Circuit Systems
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ICS94206F-T Datasheet PDF : 18 Pages
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ICS94206
Byte 0: Functionality and frequency select register (Default=0)
Bit
Description
Bit
(2,7:4)
Bit 3
Bit 1
Bit 0
Bit7 Bit6 Bit5 Bit4
Bit2
CPUCLK MHz
FS3 FS2 FS1 FS0
PCICLK
MHz
00000
80.00
40.00
0000 1
75.00
37.50
000 10
83.31
41.65
00011
66.82
33.41
0 0 10 0
103.00
34.33
0 0 10 1
112.01
37.34
00 110
68.01
34.01
00 111
100.23
33.41
0 1000
120.00
40.00
0 100 1
114.99
38.33
0 10 10
109.99
36.66
0 10 11
105.00
35.00
0 1 10 0
140.00
35.00
0 1 10 1
150.00
37.50
0 1110
124.00
31.00
0 1111
132.99
33.25
10 00 0
135.00
33.75
1000 1
129.99
32.50
100 10
126.00
31.50
100 11
118.00
39.33
10 10 0
115.98
38.66
10 10 1
95.00
31.67
10 110
90.00
30.00
10 111
85.01
28.34
1 100 0
166.00
41.50
1100 1
160.01
40.00
110 10
154.99
38.75
110 11
147.95
36.99
1 1 10 0
145.98
36.50
1 1 10 1
143.98
35.99
1 1 110
141.99
35.50
11111
138.01
34.50
0-Frequency is selected by hardware select, latched inputs
1- Frequency is selected by Bit 2,7:4
0- Normal
1- Spread spectrum enable ± 0.35% Center Spread
0- Running
1- Tristate all outputs
PWD
Note 1
0
1
0
Notes:
1. Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
5
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