ICS9248YF-138 データシートの表示（PDF） - Integrated Circuit Systems
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ICS9248YF-138
Integrated Circuit Systems
ICS9248YF-138 Datasheet PDF : 12 Pages
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ICS9248-138
Preliminary Product Preview
Serial Configuration Command Bitmap
Byte0: Functionality and Frequency Select Register (default = 0)
Bit
Bit
2, 7:4
Bit 3
Bit 1
Bit 0
Description
bit2 bit7 bit6 bit5 bit4 CPUCLK SDRAM 3V66
FS4 FS3 FS2 FS1 FS0 (MHz) (MHz) (MHz)
0 0 0 0 0 66.67 100.00 66.67
0 0 0 0 1 66.87 100.30 66.87
0 0 0 1 0 68.67 103.00 68.67
0 0 0 1 1 71.34 107.00 71.34
0 0 1 0 0 100.00 100.00 66.67
0 0 1 0 1 100.30 100.30 66.87
0 0 1 1 0 103.00 103.00 68.67
0 0 1 1 1 107.00 107.00 71.34
0 1 0 0 0 133.33 133.33 66.67
0 1 0 0 1 133.73 133.73 66.87
0 1 0 1 0 137.33 137.33 68.67
0 1 0 1 1 120.00 120.00 60.00
0 1 1 0 0 133.33 100.00 66.67
0 1 1 0 1 133.73 100.30 66.87
0 1 1 1 0 137.33 103.00 68.67
0 1 1 1 1 120.00 90.00 60.00
1 0 0 0 0 136.00 136.00 68.00
1 0 0 0 1 140.00 140.00 70.00
1 0 0 1 0 142.67 142.67 71.34
1 0 0 1 1 145.33 145.33 72.67
1 0 1 0 0 136.00 102.00 68.00
1 0 1 0 1 140.00 105.00 70.00
1 0 1 1 0 142.67 107.00 71.34
1 0 1 1 1 145.33 109.00 72.67
1 1 0 0 0 146.67 146.67 73.34
1 1 0 0 1 153.33 153.33 76.67
1 1 0 1 0 160.00 160.00 80.00
1 1 0 1 1 166.67 166.67 83.34
1 1 1 0 0 146.67 110.00 73.34
1 1 1 0 1 160.00 120.00 80.00
1 1 1 1 0 166.67 125.00 83.34
1 1 1 1 1 200.00 200.00 66.67
0 - Frequency is selected by hardware select, Latched Inputs
1 - Frequency is selected by Bit 2, 6:4
0 - Normal
1 - Spread Spectrum Enabled ± 0.25% Center Spread
0 - Running
1- Tristate all outputs
PCICLK
(MHz)
33.33
33.43
34.33
35.67
33.33
33.43
34.33
35.67
33.33
33.43
34.33
30.00
33.33
33.43
34.33
30.00
34.00
35.00
35.67
36.33
34.00
35.00
35.67
36.33
36.67
38.33
40.00
41.67
36.67
40.00
41.67
33.33
IOAPIC
(MH)
16.67
16.72
17.16
17.83
16.67
16.72
17.17
17.84
16.67
16.72
17.17
15.00
16.67
16.72
17.17
15.00
17.00
17.50
17.84
18.17
17.00
17.50
17.84
18.17
18.34
19.17
20.00
20.84
18.34
20.00
20.84
16.67
Spread Precentage
0 to -0.5% Down Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
0 to -0.5% Down Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
0 to -0.5% Down Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
0 to -0.5% Down Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
± 0.25% Center Spread
PWD
0,0000
0
1
0
Note 1: Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3.
I2C is a trademark of Philips Corporation
Third party brands and names are the property of their respective owners.
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