IA21140AF-PQF144I データシートの表示（PDF） - InnovASIC, Inc
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IA21140AF-PQF144I Datasheet PDF : 19 Pages
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IA21140AF
Preliminary Data Sheet
PCI FAST ETHERNET LAN CONTROLLER
Receive:
Timing Diagram
Tcc
Tcr
Tcf
Tch Tcl
mii_sym_rclk
Tts
Tth
mii_sym_rxd[3:0]
mii_dv
Timing Characteristics
Symbol Definition
Tcc
mii_sym_rclk cycle time (±50 ppm)
Tch
mii_sym_rclk high time
Tcl
mii_sym_rclk low time
Tcr
mii_sym_rclk rise time
Tcf
mii_sym_rclk fall time
Tts
mii_sym_rxd setup (both rise and fall) to
mii_sym_rclk rise time or mii_dv setup (both rise
and fall) to mii_rclk rise time
Tth
mii_sym_rxd hold (both rise and fall) after
mii_sym_rclk rise time or mii_dv hold (both rise
and fall) after mii_rclk rise time.
* t = 1 for 100 Mbps operation and t = 10 for 10 Mbps operation.
Min*
-
14t
14t
-
-
8
10
Typ*
40t
-
-
8
8
-
-
Max*
-
26t
26t
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
Copyright © 2001
innovASIC
The End of Obsolescence™
ENG210010110 -00
Page 14 of 19
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