HY27US08561A-T データシートの表示（PDF） - Hynix Semiconductor
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HY27US08561A-T Datasheet PDF : 47 Pages
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HY27US(08/16)561A Series
HY27SS(08/16)561A Series
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
1st Cycle
2nd Cycle
3rd Cycle
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
A0
A1
A2
A3
A4
A5
A6
A7
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
Table 3: Address Cycle Map(x8)
NOTE:
1. A8 is set to LOW or High by the 00h or 01h Command.
1st Cycle
2nd Cycle
3rd Cycle
IO0 IO1 IO2 IO3 IO4 IO5 IO6 IO7 IO8-IO15
A0
A1
A2
A3
A4
A5
A6
A7
L(1)
A9
A10
A11
A12
A13
A14
A15
A16
L(1)
A17
A18
A19
A20
A21
A22
A23
A24
L(1)
Table 4: Address Cycle Map(x16)
NOTE:
1. L must be set to Low.
FUNCTION
READ 1
READ 2
READ ID
RESET
PAGE PROGRAM
COPY BACK PGM
BLOCK ERASE
READ STATUS REGISTER
LOCK BLOCK
LOCK TIGHT
UNLOCK (start area)
UNLOCK (end area)
READ LOCK STATUS
1st CYCLE 2nd CYCLE 3rd CYCLE
00h/01h
-
-
50h
-
-
90h
-
-
FFh
-
-
80h
10h
-
00h
8Ah
(10h)
60h
D0h
-
70h
-
-
2Ah
2Ch
23h
24h
7Ah
Table 5: Command Set
4th CYCLE
Acceptable command
during busy
Yes
Yes
Rev 0.5 / Jun. 2006
9
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