HIP4081A(2004) データシートの表示（PDF） - Intersil

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HIP4081A
(Rev.:2004)

80V/2.5A Peak, High Frequency Full Bridge FET Driver

Intersil 

HIP4081A

Timing Diagrams

X = A OR B, A AND B HALVES OF BRIDGE CONTROLLER ARE INDEPENDENT

U/V = DIS = 0

TLPHL

THPHL

XLI

XHI

XLO

XHO

THPLH

U/V = DIS = 0

XLI

XHI = HI OR NOT CONNECTED

XLO

XHO

TLPLH

TR

(10% - 90%)

FIGURE 1. INDEPENDENT MODE

U/V OR DIS

XLI

XHI

XLO

XHO

TDLPLH

TREF-PW

TUEN

7

FIGURE 2. BISTATE MODE

(10% - 90%)

TDIS

FIGURE 3. DISABLE FUNCTION

TF

(10% - 90%)

(10% - 90%)

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