H8S2649 データシートの表示（PDF） - Renesas Electronics
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H8S2649 Datasheet PDF : 766 Pages
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2.7.6 Immediate#xx:8, #xx:16, or #xx:32.................................................................... 45
2.7.7 Program-Counter Relative@(d:8, PC) or @(d:16, PC) ...................................... 45
2.7.8 Memory Indirect@@aa:8 ................................................................................... 45
2.7.9 Effective Address Calculation ................................................................................ 46
2.8 Processing States.................................................................................................................. 49
2.9 Usage Note........................................................................................................................... 51
2.9.1 Notes on Using the Bit Operation Instruction......................................................... 51
Section 3 MCU Operating Modes ....................................................................... 53
3.1 Operating Mode Selection ................................................................................................... 53
3.2 Register Descriptions........................................................................................................... 54
3.2.1 Mode Control Register (MDCR) ............................................................................ 54
3.2.2 System Control Register (SYSCR)......................................................................... 55
3.3 Operating Mode Descriptions .............................................................................................. 56
3.3.1 Mode 4.................................................................................................................... 56
3.3.2 Mode 5.................................................................................................................... 56
3.3.3 Mode 6.................................................................................................................... 56
3.3.4 Mode 7.................................................................................................................... 56
3.4 Pin Functions in Each Operating Mode ............................................................................... 57
3.5 Address Map ........................................................................................................................ 58
Section 4 Exception Handling ............................................................................. 59
4.1 Exception Handling Types and Priority............................................................................... 59
4.2 Exception Sources and Exception Vector Table .................................................................. 60
4.3 Reset .................................................................................................................................... 61
4.3.1 Reset Exception Handling ...................................................................................... 61
4.3.2 Interrupts after Reset............................................................................................... 64
4.3.3 State of On-Chip Peripheral Modules after Reset Release ..................................... 64
4.4 Traces................................................................................................................................... 64
4.5 Interrupts.............................................................................................................................. 65
4.6 Trap Instruction.................................................................................................................... 66
4.7 Stack Status after Exception Handling................................................................................. 67
4.8 Usage Note........................................................................................................................... 68
Section 5 Interrupt Controller.............................................................................. 69
5.1 Features................................................................................................................................ 69
5.2 Input/Output Pins................................................................................................................. 71
5.3 Register Descriptions........................................................................................................... 72
5.3.1 Interrupt Priority Registers A to H, J, K, M, and O
(IPRA to IPRH, IPRJ, IPRK, IPRM, and IPRO) .................................................... 73
Rev. 2.00 Dec. 05, 2005 Page x of xxxviii
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