AN-6921 データシートの表示（PDF） - Fairchild Semiconductor

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AN-6921

Integrated Critical Mode PFC / Quasi-Resonant Current Mode PWM Controller FAN6921

Fairchild Semiconductor 

AN-6921

Final Schematic of Design Example

This section summaries the final design example. The key

system specifications are summarized in Table 1 and the key

design parameters are summarized in Table 2. The final

schematic is in Figure 19. To have enough hold-up time for

VDD during startup, a two-stage circuit is used for VDD.

Table 1. System Specifications

Input Voltage Range

Line Frequency Range

Output Voltage (Vo)

Output Power (Po)

Input

Output

90~264VAC

47~63Hz

19V

90W

Table 2. Key Design Parameters

APPLICATION NOTE

PFC Stage

PFC Output Voltage Level 1 (VO.PFC.L)

PFC Output Voltage Level 2 (VO.PFC.L)

PFC Inductor (LBOOST)

Turns of PFC Inductor (NBOOST)

Turns of ZCD Auxiliary Winding (NZCD)

Minimum Switching Frequency (fS.PFCmin)

PWM Stage

Turns of Primary Inductor of PWM Transformer (NP)

Turns of Auxiliary Winding of PWM Transformer

(NAUX)

Turns Ratio of PWM Transformer (n)

Primary Inductor (LP)

Minimum switching Frequency (fs.QRmin)

260V

400V

385µH

60T

8T

55kHz

41T

6T

6.8

700µH

52kHz

Figure 19. Final Schematic of Design Example

© 2010 Fairchild Semiconductor Corporation

Rev. 1.0.1 • 8/24/10

13

www.fairchildsemi.com

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