FAN53600 データシートの表示（PDF） - Fairchild Semiconductor
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FAN53600 Datasheet PDF : 16 Pages
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Pin Configurations
MODE A1 A2 VIN
SW B1 B2 EN
FB C1 C2 GND
Figure 2. Bumps Facing Down
Figure 3. Bumps Facing Up
Pin Definitions
Pin #
A1
B1
C1
C2
B2
A2
Name
MODE
SW
FB
GND
EN
VIN
Description
MODE. Logic 1 on this pin forces the IC to stay in PWM Mode. Logic 0 allows the IC to automatically
switch to PFM Mode during light loads. The regulator also synchronizes its switching frequency to
two times the frequency provided on this pin. Do not leave this pin floating.
Switching Node. Connect to output inductor.
Feedback. Connect to output voltage.
Ground. Power and IC ground. All signals are referenced to this pin.
Enable. The device is in Shutdown Mode when voltage to this pin is <0.4 V and enabled when
>1.2 V. Do not leave this pin floating.
Input Voltage. Connect to input power source.
© 2010 Fairchild Semiconductor Corporation
FAN53600 / FAN53610 • Rev. 1.0.0
2
www.fairchildsemi.com
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