EM73866 データシートの表示（PDF） - ELAN Microelectronics

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EM73866

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

ELAN Microelectronics 

EM73866

4-BIT MICRO-CONTROLLER FOR LCD PRODUCT

address

0000h

0002h

0004h

0006h

0008h

000Ah

000Ch

000Eh

0086h

...

07FFh

0800h

8192 x 8 bits

Reset start address

INT0 ; External interrupt service routine entry address

HTCI; High speed counter interrupt service routine entry address

TRGA; Timer/counterA interrupt serice routine entry address

TRGB; Timer/counterA interrupt serice routine entry address

TBI; Time base interrupt serice routine entry address

INT1; External interrupt serice routine entry address

SCALL, subroutine call entry address

Subroutine call entry address

designated by [LCALL a]

instruction

0FFFh

1000h

1FFFh

Data table for

[LDAX],[LDAXI]

instruction

DP is a 12-bit data register that stores the program ROM address as pointer for the ROM code data.

User has to initially load ROM address into DP with instructions "STADPL", and "STADPM, STADPH",

then then to obtain the lower nibble of ROM code data by instruction "LDAX" and higher nibble by instruction

"LDAXI"

PROGRAM EXAMPLE: Read out the ROM code of address 1777h by table-look-up instruction.

LDIA #07h;

STADPL

STADPM

STADPH

:

; [DP]L ← 07h

; [DP]M ← 07h

; [DP]H ← 07h, Load DP=777h

LDL #00h;

LDH #03h;

LDAX

; ACC ← 6h

STAMI ; RAM[30] ← 6h

LDAXI ; ACC ← 5h

STAM

; RAM[31] ← 5h

;

ORG 1777h

DATA 56h;

DATA RAM ( 500-nibble )

A total 500-nibble data RAM is available from address 000 to 1FFh. DATA RAM includes the zero page region,

stacks and data areas.

* This specification are subject to be changed without notice.

12.29.1999 5

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